DocID14273 Rev 5

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L9758

Functional description

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5.6

RESET monitors

RST5 is the reset signal tied to the VDD5 supply. This is an open collector active low signal

that pulls low when VDD5 is out of range.

RSTL is the reset signal for the VDDL supply. This is an open collector active low signal that

pulls low when VDDL is out of range. RST5 and RSTL are also driven low when STBY_OK

pin is driven low, regardless of the status of VDD5 and VDDL.

Reset Delay is the time duration from when the output (VDD5 or VDDL) is within range to

when the reset pin (RST5 or RSTL) is released. RST5 and RSTL use separate timers. This

delay is programmable via an external resistor connected to RST_TIM pin. A value of

4.7 kΩ corresponds to 1 ms and 47 kΩ to 10 ms. All values in between are linear

approximated. The timer delay is common however the attack and release times are only

dependant on the condition of the respective supplies (VDD5 or VDDL).

5.7

Thermal protection

The tracking regulators incorporate thermal limit with shutdown. When the junction

temperature reaches the shutdown threshold, if there is a tracking regulator in current

limitation, it switches off and all the other regulators stay on. When the temperature

decreases the regulator restarts. The over temperature shutdown has a hysteresis to avoid

thermal pumping.

5.8

Reference current

The L9758 provides a DC voltage at the REXT pin. An external resistor to ground creates a

reference current which is mirrored internally for use in the device.

The reference current is used to supply all the analog blocks and to charge and discharge

an integrated capacitor to generate a 5 MHz clock for the switching functionality.

Figure 3. Current reference generator

The circuit is designed for a 10 kΩ resistor. For all affected parameters, this resistor value is

mentioned in the electrical characteristics section.