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ADS5294IPFPR датащи(PDF) 59 Page - Texas Instruments |
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ADS5294IPFPR датащи(HTML) 59 Page - Texas Instruments |
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59 / 82 page ![]() 59 ADS5294 www.ti.com SLAS776E – NOVEMBER 2011 – REVISED APRIL 2018 Product Folder Links: ADS5294 Submit Documentation Feedback Copyright © 2011–2018, Texas Instruments Incorporated In addition to the above, the SYNC also synchronizes the RAMP test patterns across channels. In order to synchronize the test patterns, TP_HARD_SYNC must be set as '1'. Setting TP_HARD_SYNC = 1 actually disables the sync of the filters. 9.6.1.14 External Reference Mode of Operation The ADS5294 supports an external reference mode of operation in one of two ways: a. By forcing the reference voltages on the REFT and REFB pins. b. By applying the reference voltage on VCM pin. This mode can be used to operate multiple ADS5294 chips with the same (externally applied) reference voltage. Using the REF pins: For normal operation, the device requires two reference voltages: REFT and REFB. By default, the device generates these two voltages internally. To enable the external reference mode, set the register bits as shown in Table 23 which powers down the internal reference amplifier and the two reference voltages are forced directly on the REFT and REFB pins as VREFT = 1.45 V ± 50 mV and VREFB = 0.45 V ±50 mV. Note that the relation between the ADC full-scale input voltage and the applied reference voltages is Full-scale input voltage = 2 × (VREFT – VREFB) (5) Using the VCM pin: In this mode, an external reference voltage VREFIN can be applied to the VCM pin such that Full-scale input voltage = 2 × VREFIN x (2 / 3) (6) To enable this mode, set the register bits as shown in Table 23 which changes the function of the VCM pin to an external reference input pin. The voltage applied on VCM must be 1.5 V ±50 mV. Table 23. External Reference Function Function EN_HIGH_ADDRS ( 0x1[4]) EN_EXT_REF (0xF0[15]) EXT_REF_VCM (0x42[15,3]) External reference using REFT and REFB pins 1 1 00 External reference using VCM pin 1 1 11 9.6.1.15 Data Output Format Modes Table 24. Data Output Format Modes ADDR. (HEX) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 NAME 46 1 X BTC_MODE 46 1 X MSB_FIRST |
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