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DLP650LNIR

DLPS136 – NOVEMBER 2018

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Copyright © 2018, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

All voltages are referenced to common ground VSS. VCC, VCCI, VCC2 power supplies are all required for all DMD operating modes.

VMBRSTsignals are also required to be at the appropriate voltage at the appropriate time as controlled by the DLPC410 and DLPA200.

(3)

VCC2 supply transients must fall within specified voltages.

(4)

Exceeding the recommended allowable voltage difference between VCC and VCCI may result in excessive current draw.

(5)

The maximum LVDS input voltage rating applies when each input of a differential pair is at the same voltage potential.

(6)

The highest micromirror temperature (as calculated using Micromirror Temperature Calculations) or of any point along the window edge

as defined in Figure 20. The locations of thermal test points TP2, TP3, TP4, and TP5 in Figure 20 are intended to measure the highest

window edge temperature. If a particular application causes another point on the window edge to be at a higher temperature, use that

point.

(7)

Temperature delta is the highest difference between the ceramic test point 1 (TP1) and anywhere on the window edge as shown in

Figure 20. The window test points TP2, TP3, TP4, and TP5 shown in Figure 20 are intended to result in the worst case delta. If a

particular application causes another point on the window edge to result in a larger delta temperature, then use that point.

6 Specifications

6.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted).

(1)

MIN

MAX

UNIT

SUPPLY VOLTAGES

VCC

Supply voltage for LVCMOS core logic(2)

–0.5

4

V

VCCI

Supply voltage for LVDS Interface (2)

–0.5

4

V

VCC2

Micromirror Electrode and HVCMOS voltage(2)(3)

–0.5

9

V

VMBRST

Input voltage for MBRST(15:0) (2)

–28

28

V

|VCCI – VCC|

Supply voltage delta (absolute value)(4)

0.3

V

INPUT VOLTAGES

Input voltage for all other input pins(2)

–0.5

VCC + 0.3

V

|VID|

Input differential voltage (absolute value)(5)

700

mV

ENVIRONMENTAL

TMIRROR and TWINDOW

Temperature, operating(6)

0

90

°C

Temperature, non–operating(6)

–40

90

°C

|TDELTA|

Absolute Temperature delta between any point on the window edge and the

ceramic test point TP1(7)

30

°C

TDP

Dew point temperature, operating and non–operating (noncondensing)

81

°C