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TCA9538DBRG4.A датащи(PDF) 6 Page - Texas Instruments

номер детали TCA9538DBRG4.A
подробное описание детали  TCA9538 Low Voltage 8-Bit I2C and SMBus Low-Power I/O Expander with Interrupt Output, Reset, and Configuration Registers
PDF  40 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
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TCA9538DBRG4.A датащи(HTML) 6 Page - Texas Instruments

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TCA9538
SCPS199D – AUGUST 2014 – REVISED OCTOBER 2016
www.ti.com
Product Folder Links: TCA9538
Submit Documentation Feedback
Copyright © 2014–2016, Texas Instruments Incorporated
Electrical Characteristics (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP(1)
MAX
UNIT
ICC
Operating mode
VI = VCC or GND, IO = 0,
I/O = inputs, fscl = 400 kHz, No load
tr = 3 ns
5.5 V
18
30
μA
VI = VCC or GND, IO = 0,
I/O = inputs, fscl = 400 kHz, No load
tr,max = 300 ns
5.5 V
34
3.6 V
15
2.7 V
9
1.65 V
5
VI = VCC or GND, IO = 0,
I/O = inputs, fscl = 100 kHz, No load
tr,max = 1 µs
5.5 V
20
3.6 V
8
2.7 V
5
1.65 V
3
Standby mode
VI = VCC or GND, IO = 0,
I/O = inputs, fscl = 0 kHz, No load
5.5 V
1.9
3.5
μA
3.6 V
1.1
1.8
2.7 V
1
1.6
1.65 V
0.4
1
ΔICC
Additional current in standby
mode
One P-port input at VCC – 0.6 V,
Other P-port inputs at VCC or GND
1.65 V to 5.5 V
70
µA
Ci
SCL
VI = VCC or GND
1.65 V to 5.5 V
4
5
pF
Cio
SDA
VIO = VCC or GND
1.65 V to 5.5 V
5.5
6.5
pF
P port
8
9.5
6.6 I
2C Interface Timing Requirements
over operating free-air temperature range (unless otherwise noted) (see Figure 9)
MIN
MAX
UNIT
STANDARD MODE
fscl
I2C clock frequency
0
100
kHz
tsch
I2C clock high time
4
μs
tscl
I2C clock low time
4.7
μs
tsp
I2C spike time
50
ns
tsds
I2C serial-data setup time
250
ns
tsdh
I2C serial-data hold time
0
ns
ticr
I2C input rise time
1000
ns
ticf
I2C input fall time
300
ns
tocf
I2C output fall time
10-pF to 400-pF bus
300
ns
tbuf
I2C bus free time between Stop and Start
4.7
μs
tsts
I2C Start or repeated Start condition setup
4.7
μs
tsth
I2C Start or repeated Start condition hold
4
μs
tsps
I2C Stop condition setup
4
μs
tvd(data)
Valid data time
SCL low to SDA output valid
3.45
μs
tvd(ack)
Valid data time of ACK condition
ACK signal from SCL low to
SDA (out) low
3.45
μs
Cb
I2C bus capacitive load
400
ns
FAST MODE
fscl
I2C clock frequency
0
400
kHz
tsch
I2C clock high time
0.6
μs
tscl
I2C clock low time
1.3
μs
tsp
I2C spike time
50
ns
tsds
I2C serial-data setup time
100
ns



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