7 Detailed Description

7.1 Overview

The CDC3RL02 is a two-channel clock fan-out buffer and is designed for use in portable end-equipment, such

as mobile phones, that require clock buffering with minimal additive phase noise and fan-out capabilities. The

device buffers a single master clock, such as a temperature compensated crystal oscillator (TCXO) to multiple

peripherals. The device has two clock request inputs (CLK_REQ1 and CLK_REQ2), each of which enable a

single clock output.

The CDC3RL02 accepts square or sine waves at the master clock input (MCLK_IN), eliminating the need

for an AC coupling capacitor. The smallest acceptable sine wave is a 0.3V signal (peak-to-peak). CDC3RL02

is designed to offer minimal channel-to-channel skew, additive output jitter, and additive phase noise. The

adaptive clock output buffers offer controlled slew-rate over a wide capacitive loading range which minimizes

EMI emissions, maintains signal integrity, and minimizes ringing caused by signal reflections on the clock

distribution lines.

The CDC3RL02 has an integrated Low-Drop-Out (LDO) voltage regulator which accepts input voltages from

2.3V to 5.5V and outputs 1.8V, 50mA. This 1.8V supply is externally available to provide regulated power to

peripheral devices such as a TCXO.

7.2 Functional Block Diagram

VBATT

GND

MCLK_IN

LDO

Switch/

Decoder

EN

VCC

VLDO

CLK_OUT1

CLK_REQ1

CLK_OUT2

CLK_REQ2

EN

VCC

Copyright © 2017, Texas Instruments Incorporated

7.3 Feature Description

7.3.1 Low Additive Noise

The CDC3RL02 features –149dBc/Hz at 10kHz offset phase noise and 0.37ps (RMS) of output jitter, to provide

low noise buffered signals.

7.3.2 Regulated 1.8V Externally Available I/O Supply

The CDC3RL02 allows users to connect to the output of the internal LDO, for providing power to other ICs. For

more information, refer to LDO.

7.3.3 Ultra-Small 8-bump YFP 0.4mm Pitch WCSP Package

Using the ultra-small YFP package, the CDC3RL02 is very small and allows the device to be placed on a board

with minimum work.

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CDC3RL02

SCHS371H – NOVEMBER 2009 – REVISED OCTOBER 2024

Copyright © 2024 Texas Instruments Incorporated

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Product Folder Links: CDC3RL02