4 Device Comparison

Table 4-1. Device Comparison

TA

PACKAGE (1)

ORDERABLE PART NUMBER

BACKSIDE

COATING (2)

-40°C to 85°C

YFP

CDC3RL02BYFPR

Yes

-40°C to 85° C

YFP

CDC3RL02YFPR

No

(1)

Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

(2)

CSP (DSBGA) devices manufactured with backside coating have an increased resistance to cracking due to the increased physical

strength of the package. Devices with backside coating are highly encouraged for new designs.

5 Pin Configuration and Functions

1

2

C

B

A

A1

A2

B2

C2

D2

B1

C1

D1

D

Figure 5-1. YFP Package 8-Pin DSBGA Top View

Table 5-1. Pin Functions

PIN

Type(1)

DESCRIPTION

NAME

NO.

VBATT

A1

I

Input to internal LDO

CLK_OUT1

A2

O

Clock output 1

VLDO

B1

O

1.8V I/O supply for CDC3RL02 and external TCXO

CLK_REQ1

B2

I

Clock request 1 (from peripheral) for Clock output 1

MCLK_IN

C1

I

Master clock input

CLK_REQ2

C2

I

Clock request 2 (from peripheral) for Clock output 2

GND

D1

–

Ground

CLK_OUT2

D2

O

Clock output 2

(1)

I = Input, O = Output

Table 5-2. YFP Package Pin Assignments

1

2

A

VBATT

CLK_OUT1

B

VLDO

CLK_REQ1

C

MCLK_LIN

CLK_REQ2

D

GND

CLK_OUT2

www.ti.com

CDC3RL02

SCHS371H – NOVEMBER 2009 – REVISED OCTOBER 2024

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