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TVP5146M2IPFPR датащи(PDF) 95 Page - Texas Instruments

номер детали TVP5146M2IPFPR
подробное описание детали  NTSC/PAL/SECAM 4×10-Bit Digital Video Decoder With Macrovision™ Detection, YPbPr Inputs, 5-Line Comb Filter, and SCART Support
PDF  109 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
Logo TI2 - Texas Instruments

TVP5146M2IPFPR датащи(HTML) 95 Page - Texas Instruments

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t1
DATACLK
Y, C, AVID, VS, HS, FID
t4
t2
t3
t5
VOH
VOL
Valid Data
Valid Data
VOH
VOL
t5
Stop
Start
VC1 (SDA)
t1
t6
t7
t2
t8
t3
t4
t6
VC0 (SCL)
Data
Stop
Change
Data
TVP5146M2
www.ti.com
SLES141H
– JULY 2005 – REVISED FEBRUARY 2012
3.7
Clocks, Video Data, Sync Timing
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Duty cycle, DATACLK
45
50
55
%
t1
High time, DATACLK
18.5
ns
t2
Low time, DATACLK
18.5
ns
t3
Fall time, DATACLK
90% to 10%
4
ns
t4
Rise time, DATACLK
10% to 90%
4
ns
Commercial
10
t5
Output delay time
ns
Industrial
12
Figure 3-1. Clocks, Video Data, and Sync Timing
3.8
I
2C Host Port Timing
PARAMETER
MIN
TYP
MAX
UNIT
t1
Bus free time between STOP and START
1.3
µs
t2
Data hold time
0
0.9
µs
t3
Data setup time
100
ns
t4
Setup time for a (repeated) START condition
0.6
µs
t5
Setup time for a STOP condition
0.6
ns
t6
Hold time (repeated) START condition
0.6
µs
t7
Rise time VC1(SDA) and VC0(SCL) signal
250
ns
t8
Fall time VC1(SDA) and VC0(SCL) signal
250
ns
Cb
Capacitive load for each bus line
400
pF
fI2C
I2C clock frequency
400
kHz
Figure 3-2. I2C Host Port Timing
Copyright
© 2005–2012, Texas Instruments Incorporated
Electrical Specifications
95
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Product Folder Link(s): TVP5146M2



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