TVP5146M2IPFPR datasheet(32/109 Pages) TI2

32 / 109 page

TVP5146M2

SLES141H

– JULY 2005 – REVISED FEBRUARY 2012

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2.6

2C Host Interface

Communication with the TVP5146M2 decoder is via an I2C host interface. The I2C standard consists of

two signals, the serial input/output data (SDA) line and the serial input clock line (SCL), which carry

information between the devices connected to the bus. A third signal (I2CA) is used for slave address

selection. Although an I2C system can be multimastered, the TVP5146M2 decoder functions as a slave

device only.

Because SDA and SCL are kept open drain at a logic-high output level or when the bus is not driven, the

user must connect SDA and SCL to a positive supply voltage via a pullup resistor on the board. The slave

addresses select signal, terminal 37 (I2CA), enables the use of two TVP5146M2 devices tied to the same

I2C bus, because it controls the least-significant bit of the I2C device address.

Table 2-4. I2C Host Interface Terminal Description

SIGNAL

TYPE

DESCRIPTION

I2CA

Slave address selection

SCL

I/O

Input/output clock line

SDA

I/O

Input/output data line

2.6.1

Reset and I

2C Bus Address Selection

The TVP5146M2 decoder can respond to two possible chip addresses. The address selection is made at

reset by an externally supplied level on the I2CA terminal. The TVP5146M2 decoder samples the level of

terminal 37 at power up or at the trailing edge of RESETB and configures the I2C bus address bit A0.

Table 2-5. I2C Address Selection

A0 (I2CA)

R/W

HEX

0 (default)

1/0

B9/B8

1(1)

1/0

BB/BA

(1)

If terminal 37 is strapped to DVDD via a 2.2-k

Ω resistor, I2C device address A0 is set to 1.

2.6.2

2C Operation

Data transfers occur using the following illustrated formats.

10111000

ACK

Subaddress

ACK

Send Data

ACK

Read from I2C control registers

10111000

ACK

Subaddress

ACK

10111001

ACK

Receive Data

NAK

S = I2C bus start condition

P = I2C bus stop condition

ACK = Acknowledge generated by the slave

NAK = Acknowledge generated by the master, for multiple-byte read master with ACK each

byte except last byte

Subaddress = Subaddress byte

Data = Data byte. If more than one byte of data is transmitted (read and write), the

subaddress pointer is automatically incremented.

I2C bus address = Example shown that I2CA is in default mode [write (B8h), read (B9h)]

Functional Description

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