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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LP5520TL/NOPB датащи(PDF) 28 Page - Texas Instruments |
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LP5520TL/NOPB датащи(HTML) 28 Page - Texas Instruments |
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28 / 45 page  28 LP5520 SNVS440B – MAY 2007 – REVISED MARCH 2016 www.ti.com Product Folder Links: LP5520 Submit Documentation Feedback Copyright © 2007–2016, Texas Instruments Incorporated 7.6 Register Maps 7.6.1 LP5520 Registers, Control Bits, and Default Values All registers have their default value after power-on or reset. Default value for correction registers is 1000 0000 (multiplier = 1). Default value for adaptive voltage control and fast PWM is on. Default value for current set registers is 55H which sets the current to 20 mA. Default value for all other register bits is 0. Note that in automatic compensation mode the LED currents are obtained from the EEPROM. Bits with r/o are read-only bits. ADR REG NAME D7 D6 D5 D4 D3 D2 D1 D0 DEFAULT 00H rgb control seq_ mode[1] seq_ mode[0] en_fade pwm_ fast rgb_auto en_b en_g en_r 0001 0000 01H current control (R) cc_r[7] cc_r[6] cc_r[5] cc_r[4] cc_r[3] cc_r[2] cc_r[1] cc_r[0] 0101 0101 02H current control (G) cc_g[7] cc_g[6] cc_g[5] cc_g[4] cc_g[3] cc_g[2] cc_g[1] cc_g[0] 0101 0101 03H current control (B) cc_b[7] cc_b[6] cc_b[5] cc_b[4] cc_b[3] cc_b[2] cc_b[1] cc_b[0] 0101 0101 04H pwm brightness brc_off bri2 bri1 bri0 0000 0000 05H boost output vprog[4] vprog[3] vprog[2] vprog[1] vprog[0] 0000 0000 06H control adc_ch comp_ sel en_ autoload vout_ auto en_boost nstby 0000 0100 08H ADC_ hi_byte bit11 (r/o) bit10 (r/o) bit9 (r/o) bit8 (r/o) 09H ADC_ low_byte bit7 (r/o) bit6 (r/o) bit5 (r/o) bit4 (r/o) bit3 (r/o) bit2 (r/o) bit1 (r/o) bit0 (r/o) 0AH R correction corr_r[7] corr_r[6] corr_r[5] corr_r[4] corr_r[3] corr_r[2] corr_r[1] corr_r[0] 1000 0000 0BH G correction corr_g[7] corr_g[6] corr_g[5] corr_g[4] corr_g[3] corr_g[2] corr_g[1] corr_g[0] 1000 0000 0CH B correction corr_b[7] corr_b[6] corr_b[5] corr_b[4] corr_b[3] corr_b[2] corr_b[1] corr_b[0] 1000 0000 0DH EEPROM Control ee_ready (r/o) ee_erase ee_prog ee_read ee_page[1 ] ee_page[0] 0000 0000 Register addresses from 40H to 5FH contain the EEPROM page. EEPROM access is described in the Calibration Memory chapter. |
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