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SX28AC/DP датащи(PDF) 35 Page - Parallax Inc |
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SX28AC/DP датащи(HTML) 35 Page - Parallax Inc |
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35 / 51 page ![]() Parallax SX20AC/SX28AC www.parallax.com © Parallax Inc. Page 35 of 51 Rev 1.6 11/20/2006 16.0 NATIVE SX INSTRUCTION SET SUMMARY TABLES Table 16-1 through Table 16-6 list all of the native assembly instructions, organized by category. For each instruction, the table shows the instruction mnemonic (as written in assembly language), a brief description of what the instruction does, the number of instruction cycles required for execution, the binary opcode, and the status bits affected by the instruction. The “Clock Cycles (Turbo)” column typically shows a value of 1, which means that the overall throughput for the instruction is one per clock cycle. Exceptions include program control branch instructions, which take 3 clock cycles, and the system control instruction IREAD, which takes 4. In some cases, the exact number of cycles depends on the outcome of the instruction (such as the test-and-skip instructions) or the clocking mode (Slow or Turbo). In those cases, all possible numbers of cycles are shown in the table. The instruction execution time is derived by dividing the oscillator frequency by either one (Turbo mode) or four (Slow). The divide-by factor is selected through the FUSE Word register. A superset of these instructions are available in the SASM assembler of the SX-Key IDE, and supported by the SX Key User’s Manual. Both are available for free download from www.parallax.com/sx. Table 16-1: Native SX Instruction Set: Logical Operands Mnemonic, Operands Description Clock Cycles (Slow Mode) Clock Cycles (Turbo) Opcode Bits Affected AND fr,W AND of fr and W into fr (fr = fr & W) 4 1 0001 011f ffff Z AND W,fr AND of W and fr into W (W = W & fr) 4 1 0001 010f ffff Z AND W,#lit AND of W and Literal into W (W = W &b lit) 4 1 1110 kkkk kkkk Z NOT fr Complement of fr into fr (fr = fr ^ FFh) 4 1 0010 011f ffff Z OR fr,W OR of fr and W into fr (fr = fr | W) 4 1 0001 001f ffff Z OR W,fr OR of W and fr in to fr (W – W | fr) 4 1 0001 000f ffff Z OR w,#lit Or of W and Literal into W (W = W | lit) 4 1 1101 kkkk kkkk Z XOR fr,W XOR of fr and W into fr (fr = fr ^ W) 4 1 0001 101f ffff Z XOR W,fr XOR of W and fr into W (W = W ^ fr) 4 1 0001 100f ffff Z XOR W,#lit XOR of W and Literal into W (W = W ^ lit) 4 1 1111 kkkk kkkk Z |
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