TMP86FS28DFG datasheet(222/272 Pages) TOSHIBA

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Page 210

17. Flash Memory

17.1 Flash Memory Control

TMP86FS28DFG

17.1 Flash Memory Control

The flash memory is controlled via the flash memory control register (FLSCR) and flash memory stanby control

resister (FLSSTB).

Note 1: The command sequence of the flash memory can be executed only when FLSMD="0011B". In other cases, any attempts

to execute the command sequence are ineffective.

Note 2: FLSMD must be set to either "1100B" or "0011B".

Note 3: BANKSEL is effective only in the serial PROM mode. In the MCU mode, the flash memory is always accessed with actual

addresses (1000-FFFFH) regardless of BANKSEL.

Note 4: Bits 2 through 0 in FLSCR are always read as don’t care.

Note 1: When FSTB is set to 1, do not execute the read/write instruction to the flash memory because there is a possibility that the

expected data is not read or the program is not operated correctly. If executing the read/write instruction, FSTB is initial-

ized to 0 automatically.

Note 2: If an interrupt is issued when FSTB is set to 1, FSTB is initialized to 0 automatically and then the vector area of the flash

memory is read.

Note 3: If the IDLE0/1/2, SLEEP0/1/2 or STOP mode is activated when FSTB is set to 1, FSTB is initialized to 0 automatically. In

the IDLE0/1/2, SLEEP0/1/2 or STOP mode, the standby function operates regardless of FSTB setting.

17.1.1 Flash Memory Command Sequence Execution Control (FLSCR<FLSMD>)

The flash memory can be protected from inadvertent write due to program error or microcontroller misoper-

ation. This write protection feature is realized by disabling flash memory command sequence execution via the

flash memory control register (write protect). To enable command sequence execution, set FLSCR<FLSMD>

to “0011B”. To disable command sequence execution, set FLSCR<FLSMD> to “1100B”. After reset,

FLSCR<FLSMD> is initialized to “1100B” to disable command sequence execution. Normally,

FLSCR<FLSMD> should be set to “1100B” except when the flash memory needs to be written or erased.

17.1.2 Flash Memory Bank Select Control (FLSCR<BANKSEL>)

In the serial PROM mode, a 2-kbyte BOOTROM is mapped to addresses 7800H-7FFFH and the flash mem-

ory is mapped to 2 banks at 8000H-FFFFH. Flash memory addresses 1000H-7FFFH are mapped to 9000H-

FFFFH as BANK0, and flash memory addresses 8000H-FFFFH are mapped to 8000H-FFFFH as BANK1.

FLSCR<BANKSEL> is used to switch between these banks. For example, to access the flash memory address

7000H, set FLSCR<BANKSEL> to “0” and then access F000H. To access the flash memory address 9000H,

set FLSCR<BANKSEL> to “1" and then access 9000H.

In the MCU mode, the flash memory is accessed with actual addresses at 1000H-FFFFH. In this case,

FLSCR<BANKSEL> is ineffective (i.e., its value has no effect on other operations).

Flash Memory Control Register

FLSCR

654

(0FAFH)

FLSMD

BANKSEL

(Initial value : 1100 1***)

FLSMD

Flash memory command sequence exe-

cution control

1100: Disable command sequence execution

0011: Enable command sequence execution

Others: Reserved

R/W

BANKSEL

Flash memory bank select control

(Serial PROM mode only)

0: Select BANK0

1: Select BANK1

R/W

Flash Memory Standby Control Register

FLSSTB

654

(0FADH)

FSTB

(Initial value : **** ***0)

FSTB

Flash memory standby control

0: Disable the standby function.

1: Enable the standby function.

Write

only

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