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TMP86FS28DFG датащи(PDF) 205 Page - Toshiba Semiconductor |
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TMP86FS28DFG датащи(HTML) 205 Page - Toshiba Semiconductor |
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205 / 272 page ![]() Page 193 TMP86FS28DFG 16. LCD Driver The TMP86FS28DFG has a driver and control circuit to directly drive the liquid crystal device (LCD). The pins to be connected to LCD are as follows: 1. Segment output port 40 pins (SEG39 to SEG0) 2. Common output port4 pins (COM3 to COM0) In addition, C0, C1, V1, V2, V3 pin are provided for the LCD driver’s booster circuit. The devices that can be directly driven is selectable from LCD of the following drive methods: 1. 1/4 Duty (1/3 Bias) LCD Max 160 Segments(8 segments × 20 digits) 2. 1/3 Duty (1/3 Bias) LCD Max 120 Segments(8 segments × 15 digits) 3. 1/2 Duty (1/2 Bias) LCD Max 80 Segments(8 segments × 10 digits) 4. Static LCD Max 40 Segments(8 segments × 5 digits) 16.1 Configuration Figure 16-1 LCD Driver Note: The LCD driver incorporates a dedicated divider circuit. Therefore, the break function of a debugger (development tool) will not stop LCD driver output. COM3 COM0 V1 Duty control fc/217, fs/29 fc/213 fc/216, fs/28 Common driver DBR display data area Display data select control Timing control Display data buffer register Blanking control Segment driver fc/215 LCDCR to 7 6 5 4 3 2 1 0 DUTY SLF EDSP VFSEL Constant voltage booster circuit BRES fc/213, fs/25 fc/29 fc/211, fs/23 V2 V3 C0 C1 fc/210, fs/22 SEG0 SEG39 |
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