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PCAL9722 датащи(PDF) 39 Page - NXP Semiconductors

номер детали PCAL9722
подробное описание детали  Ultra low-voltage translating 22-bit SPI I/O expander with Agile I/O features, interrupt output and reset
PDF  63 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

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NXP Semiconductors
PCAL9722
Ultra low-voltage translating 22-bit SPI I/O expander with Agile I/O features, interrupt output and
reset
Tamb = -40 °C to +85 °C; VDD(SPI) = 1.1 V to 5.5 V; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ [1] Max
Unit
ADDR, SCLK, SDIN, CS, and RESET;
one input at VDD(SPI) - 0.6 V, other inputs
at VDD(SPI) or VSS; VDD(P) = 1.65 V to 5.5 V
-
-
30
μA
ΔIDD
additional quiescent
supply current [5]
P port; one input at VDD(P) - 0.6 V, other
inputs at VDD(P) or VSS; VDD(P) = 1.65 V to
5.5 V
-
-
80
μA
Ci
input capacitance [6]
VI = VDD(SPI) or VSS; VDD(P) = 1.65 V to
5.5 V
-
6
7
pF
VI/O = VDD(SPI) or VSS; VDD(P) = 1.65 V to
5.5 V
-
7
8
pF
Cio
input/output capacitance
[6]
VI/O = VDD(P) or VSS; VDD(P) = 1.65 V to
5.5 V
-
7.5
8.5
pF
Rpu(int)
internal pull-up resistance input/output
50
100
150
kΩ
Rpd(int)
internal pull-down
resistance
input/output
50
100
150
kΩ
Table 64. Static characteristics for PCAL9722HN...continued
[1]
For IDD, all typical values are at nominal supply voltage (1.8 V, 2.5 V, 3.3 V or 3.6 V VDD) and Tamb = 25 °C. Except for IDD, the typical values are at VDD(P)
= VDD(SPI) = 3.3 V and Tamb = 25 °C.
[2]
The total current sourced by all I/Os must be limited to 160 mA.
[3]
Each I/O must be externally limited to a maximum of 25 mA and each octal (P0_0 to P0_7 and P1_0 to P1_7) must be limited to a maximum current of
100 mA, for a device total of 200 mA.
[4]
Typical value for Tamb = 25 °C. VOL = 0.4 V and VDD(SPI) = VDD(P) = 3.3 V. Typical value for VDD(SPI) = VDD(P) < 2.5 V, VOL = 0.6 V.
[5]
Internal pull-up/pull-down resistors disabled.
[6]
Value not tested in production, but guaranteed by design and characterization.
Tamb = -40 °C to +125 °C; VDD(SPI) = 1.1 V to 5.5 V; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ [1] Max
Unit
VIK
input clamping voltage
II = -18 mA
-1.2
-
-
V
VPOR
power-on reset voltage
VI = VDD(P) or VSS; IO = 0 mA
-
1.2
1.5
V
P port; IOH = -8 mA; CCX.X = 11b
VDD(P) = 1.65 V
1.2
-
-
V
VDD(P) = 2.3 V
1.8
-
-
V
VDD(P) = 3 V
2.6
-
-
V
VDD(P) = 4.5 V
4.1
-
-
V
P port; IOH = -2.5 mA and CCX.X = 00b;
IOH = -5 mA and CCX.X = 01b;
IOH = -7.5 mA and CCX.X = 10b;
IOH = -10 mA and CCX.X = 11b;
VDD(P) = 1.65 V
1.1
-
-
V
VDD(P) = 2.3 V
1.7
-
-
V
VDD(P) = 3 V
2.5
-
-
V
VOH
HIGH-level output voltage
[2]
VDD(P) = 4.5 V
4.0
-
-
V
Table 65. Static characteristics for PCAL9722HN/Q900
PCAL9722
All information provided in this document is subject to legal disclaimers.
© 2023 NXP B.V. All rights reserved.
Product data sheet
Rev. 1.1 — 1 May 2023
39 / 63



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