PCAL9722 datasheet(16/63 Pages) NXP

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NXP Semiconductors

PCAL9722

Ultra low-voltage translating 22-bit SPI I/O expander with Agile I/O features, interrupt output and

reset

Bit

Default

0 (NA)

Table 27. Input latch port 2 register (address 4Ah)...continued

6.4.7 Pull-up/pull-down enable registers (4Ch, 4Dh, 4Eh)

The pull-up and pull-down enable registers allow the user to enable or disable pull-up/pull-down resistors on

the I/O pins. Setting the bit to logic 1 enables the selection of pull-up/pull-down resistors. Setting the bit to logic

0 disconnects the pull-up/pull-down resistors from the I/O pins. Also, the resistors will be disconnected when

the outputs are configured as open-drain outputs (see Section 6.4.11 and Section 6.4.15). Use the pull-up/pull-

down registers to select either a pull-up or pull-down resistor. A register group write operation is described in

Section 7.3. A register group read operation is described in Section 7.5.

Bit

Symbol

PE0.7

PE0.6

PE0.5

PE0.4

PE0.3

PE0.2

PE0.1

PE0.0

Default

Table 28. Pull-up/pull-down enable port 0 register (address 4Ch)

Bit

Symbol

PE1.7

PE1.6

PE1.5

PE1.4

PE1.3

PE1.2

PE1.1

PE1.0

Default

Table 29. Pull-up/pull-down enable port 1 register (address 4Dh)

Bit

Symbol

PE2.7

PE2.6

PE2.5

PE2.4

PE2.3

PE2.2

PE2.1

PE2.0

Default

0 (NA)

Table 30. Pull-up/pull-down enable port 2 register (address 4Eh)

6.4.8 Pull-up/pull-down selection registers (50h, 51h, 52h)

The I/O port can be configured to have pull-up or pull-down resistor by programming the pull-up/pull-down

selection register. Setting a bit to logic 1 selects a 100 kΩ pull-up resistor for that I/O pin. Setting a bit to logic

0 selects a 100 kΩ pull-down resistor for that I/O pin. If the pull-up/down feature is disconnected, writing to this

A register group write operation is described in Section 7.3. A register group read operation is described in

Section 7.5.

Bit

Symbol

PUD0.7

PUD0.6

PUD0.5

PUD0.4

PUD0.3

PUD0.2

PUD0.1

PUD0.0

Default

Table 31. Pull-up/pull-down selection port 0 register (address 50h)

PCAL9722

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.1 — 1 May 2023

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