FXLS8971CF datasheet(53/100 Pages) NXP

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NXP Semiconductors

FXLS8971CF

3-Axis Low-g Accelerometer

Field

Description

VECM_EN

Vector Magnitude calculation enable:

0 (default): 12-bit vector magnitude result is not calculated on every ODR cycle. The VECM_LSB and

VECM_MSB registers are not included in auto-increment address range.

1: 12-bit vector magnitude result is calculated on every ODR cycle. The VECM_LSB and VECM_MSB

registers are included in auto-increment address range.

Note: The vector magnitude result may also be used as an input to the SDCD function when SDCD_

CONFIG2[MODE] = 1.

X_DIS

X-axis auto-increment disable:

0 (default): X-axis measurement is included in the auto-increment address range for both buffered

and non-buffered modes (default).

1: X-axis measurement is excluded from the auto-increment address range.

Y_DIS

Y-axis auto-increment disable:

0 (default): Y-axis measurement is included in the auto-increment address range for both buffered

and non-buffered modes (default).

1: Y-axis measurement is excluded from the auto-increment address range.

Z_DIS

Z-axis auto-increment disable:

0 (default): Z-axis measurement is included in the auto-increment address range for both buffered

and non-buffered modes (default).

1: Z-axis measurement is excluded from the auto-increment address range.

HIBERNATE_EN

Hibernate mode enable:

0: Hibernate mode not enabled; device is operating per the mode selected in WAKE_PM/SLEEP_

PM[1:0]

1: Commands device to enter Hibernate mode; all RAM register contents are lost.

Notes:

• When BT_MODE = GND:

When Hibernate Mode is selected, FXLS8971CF is completely shut down (similar to removing the

VDD supply), with all register contents lost. To exit Hibernate Mode, a positive or negative going

edge must be applied to the SPI_CS_B/WAKE_UP pin (logic level must toggle from the state

applied at the time this bit was set). The host must then wait TBOOT1 ms for the part to re-enter

Standby mode before attempting communications over the I2C or SPI interfaces.

• When BT_MODE = VDD:

Hibernate mode is automatically entered/exited based on the level input to the MOT_DET pin. The

part directly enters Active mode with the preconfigured motion detection settings when MOT_DET

is pulled high. The host must wait TBOOT2 ms for the boot process to complete and the motion

detection process to begin. When MOT_DET is brought low, the part automatically enters Hibernate

mode to conserve power.

Table 60. SENS_CONFIG5 register (address 19h) bit description

15.3.6 WAKE_IDLE_LSB register (address 1Ah)

This register, along with WAKE_IDLE_MSB, sets the unsigned 12-bit WAKE mode idle time (off time).

Note: The contents of this register are only meaningful when SENS_CONFIG2[WAKE_PM[1:0]] = 1xb.

The counter period is nominally 312.5 µs/LSB, providing a range of 312.5 µs to 1.28 seconds. The idle time

+ measurement time (set by the WAKE mode decimation factor) forms the measurement period (ODR–1) as

described in the Section 15.3.3 register description.

FXLS8971CF

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2.1 — 7 March 2024

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