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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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FXLS8971CF датащи(PDF) 31 Page - NXP Semiconductors |
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FXLS8971CF датащи(HTML) 31 Page - NXP Semiconductors |
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31 / 100 page  NXP Semiconductors FXLS8971CF 3-Axis Low-g Accelerometer Auto-increment Address Name Type Register Address F_READ = 0 F_READ = 1 Default Values BT_MODE = GND/[VDD] Comment Output Buffer Configuration and Status BUF_STATUS[1][2] R 0Bh 0Ch/0Eh/10h 00h Buffer watermark and overflow status flags; stored sample count (buf_cnt[5:0]) BUF_X_LSB[1][3][4] R 0Ch 0Dh 0Eh/10h/0Ch — Head/Tail sample of output buffer X-axis LSB - buf_ x_out[7:0] when SENS_CONFIG2[LE_BE] = 0 and buf_x_out[11:4] when SENS_CONFIG2[LE_BE] = 1. When SENS_CONFIG5[X_DIS] = 1, this register is skipped over by the auto-increment mechanism. BUF_X_MSB[1][3][4] R 0Dh 0Eh/10h/0Ch — Head/Tail sample of output buffer X-axis MSB - buf_ x_out[11:8] when SENS_CONFIG2[LE_BE] = 0 and buf_x_out[3:0] when SENS_CONFIG2[ LE_BE] = 1. When SENS_CONFIG5[X_DIS] = 1, this register is skipped over by the auto-increment mechanism. BUF _Y_LSB[1][3][4] R 0Eh 0Fh 10h/0Ch/0Eh — Head/Tail sample of output buffer Y-axis LSB - buf_ y_out[7:0] when SENS_CONFIG2[LE_BE] = 0 and buf_y_out[11:4] when SENS_CONFIG2[ LE_BE] = 1. When SENS_CONFIG5[Y_DIS] = 1, this register is skipped over by the auto-increment mechanism. BUF _Y_MSB[1][3][4] R 0Fh 10h/0Ch/0Eh — Head/Tail sample of output buffer Y-axis MSB - buf_ Y_out[11:8] when SENS_CONFIG2[LE_BE] = 0 and buf_y_out[3:0] when SENS_CONFIG2[LE_BE] = 1. When SENS_CONFIG5[Y_DIS] = 1, this register is skipped over by the auto-increment mechanism. BUF_Z_LSB[1][3][4] R 10h 11h 0Ch/0Eh/10h — Head/Tail sample of output buffer Z-axis LSB - buf_ z_out[7:0] when SENS_CONFIG2[LE_BE] = 0 and buf_z_out[11:4] when SENS_CONFIG2[LE_BE] = 1. When SENS_CONFIG5[Z_DIS] = 1, this register is skipped over by the auto-increment mechanism. BUF_Z_MSB[1][3][4] R 11h 0Ch/0Eh/10h — Head/Tail sample of output buffer Z-axis MSB - buf_ Z_out[11:8] when SENS_CONFIG2[LE_BE] = 0 and buf_z_out[3:0] when SENS_CONFIG2[LE_BE] = 1. When SENS_CONFIG5[Z_DIS] = 1, this register is skipped over by the auto-increment mechanism. Device identification PROD_REV R 12h 13h 14h Product revision number in BCD format [maj.min] with range 1.0 to 9.9 WHO_AM_I[1] R 13h 14h 83h 8-bit NXP unique sensor product ID. System status register SYS_MODE [1] [2] R 14h 15h 00h/[01h] Current system operating mode, buffer gate error flag, and buffer gate error sample count Device configuration and control registers SENS_CONFIG1 [1] [5] R/W 15h 16h 00h/[03h] Full-scale range selection, self-test axis, and polarity selection, soft reset, Active mode enable. SENS_CONFIG2 [1] [5] R/W 16h 17h 00h WAKE and SLEEP power mode selections, little/big endian output mode, auto-increment control, fast read enable. SENS_CONFIG3 [1] [5] R/W 17h 18h 00h/[C0h] WAKE and SLEEP mode ODR and decimation selections SENS_CONFIG4 [1] [5] R/W 18h 19h 01h Auto-WAKE/SLEEP interrupt source enable bits, interrupt output pin logic polarity, and driver type, external trigger input function enable SENS_CONFIG5 [1] [5] R/W 19h 1Ah 00h/[00h] Auto-increment mechanism disable bits for X/Y/Z axis data; Hibernate mode enable WAKE_IDLE _LSB [1] [5] R/W 1Ah 1Bh 00h LSB of 12-bit user programmable WAKE mode idle time - wake_idle[7:0] WAKE_IDLE_MSB [1] [5] R/W 1Bh 1Ch 00h MSB of 12-bit user programmable WAKE mode idle time - wake_idle[11:8] Table 20. Register address map...continued FXLS8971CF All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 2.1 — 7 March 2024 31 / 100 |
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