WM8580 datasheet(68/97 Pages) WOLFSON

номер детали	WM8580

подробное описание детали	Multichannel CODEC with S/PDIF Transceiver

PDF	97 Pages

Scroll/Zoom	100%

производитель	WOLFSON [Wolfson Microelectronics plc]

домашняя страница	http://www.wolfsonmicro.com

Logo

68 / 97 page

WM8580

Production Data

PD Rev 4.3 August 2007

POWERDOWN MODES

The WM8580 has powerdown control bits allowing specific parts of the chip to be turned off when not

in use.

The ADC is powered down by setting the ADCPD register bit. The three stereo DACs each have a

separate powerdown control bit, DACPD[2:0], allowing individual stereo DACs to be powered down

when not in use. DACPD can be overwritten by setting ALLDACPD to powerdown all DACs

The S/PDIF transmitter is powered down by setting SPDIFTXD. Setting SPDIFRXD powers down the

S/PDIF receiver.

The PLL, Oscillator and S/PDIF clock recovery circuits are powered down by setting PLLPD, OSCPD

and SPDIFPD respectively.

Setting all of ADCPD, DACPD[2:0], SPDIFTXD, SPDIFRXD and OUTPD[3:0] will powerdown

everything except the references VMIDADC, ADCREF and VMIDDAC. These may be powered down

by setting PWDN. Setting PWDN will override all other powerdown control bits. It is recommended

that the ADC and DAC are powered down before setting PWDN. The default is for all powerdown bits

to be set except OSCPD and PWDN.

WM8580 датащи(PDF) 68 Page - Wolfson Microelectronics plc