STE2004S datasheet(51/79 Pages) STMICROELECTRONICS

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STE2004S

Instruction set

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5.2

Power down (PD = 1)

At power down, all LCD outputs are kept at VSS (display off). Bias generator and VLCD

generator are off (VLCDOUT output is discharged to VSS, and then VLCDOUT can be

disconnected). The internal oscillator is in off state. An external clock can be provided. The

RAM contents is not cleared.

5.3

Memory blanking procedure

This instruction fills the memory with "blank" patterns, in order to delete patterns randomly

generated in memory when starting up the device. It substitutes (102X8) single "write"

instructions. The procedure can only be programmed if:

PD bit = 0

No instruction can be programmed for a period equivalent to 102X8 internal write cycles

(102X8X1/fclock). The start of the memory blanking procedure is between one and two

fclock cycles from the last active edge (E falling edge for the parallel interface, last SCLK

rising edge for the serial and SPI interfaces, last SCL rising edge for the I2C interface).

5.4

Checker board procedure

This instruction fills the memory with "checker-board" pattern, allowing developers to create

a complex module test configuration using one instruction. It can only be programmed if:

PD bit = 0

No instruction can be programmed for a period equivalent to 102X8 internal write cycles

(102X8X1/fclock). The start of checker-board procedure is between one and two fclock

cycles from the last active edge (E falling edge for the parallel interface, last SCLK rising

edge for the serial and SPI interfaces, last SCL rising edge for the I2C interface).

5.5

Scrolling function

The STE2004S can scroll the graphics display in units of raster-rows. The scrolling function

changes the correspondence between the rows of the logical memory map and the output

row drivers. The scroll function does not affect the data ram contentm it is only related to the

visualization process. The information output on the drivers is related to the row reading

sequence (the 1st row read is output on R0, the 2nd on R1 and so on). Scrolling means

reading the matrix starting from a row that is sequentially increased or decreased. After

every scrolling command the offset between the memory address and the memory scanning

pointer is increased or decreased by one. The offset range changes in accordance with

MUX Rate. After 64th/65th scrolling commands in MUX 65 mode, or after the 48th/49th

scrolling commands in MUX 49 mode, or after 32nd/33rd scrolling command in MUX 33

mode, the offset between the memory address and the memory scanning pointer is again

zero (Cyclic Scrolling).

A Reset Scrolling Pointer instruction can be executed to force the offset between the

memory address and the memory scanning pointer to zero.

If ICON MODE =1, the Icon Row is not scrolled. If ICON MODE=0 the last row is like a

general purpose row and it is scrolled as other lines.

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