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TMUX1574DYYR датащи(PDF) 25 Page - Texas Instruments |
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TMUX1574DYYR датащи(HTML) 25 Page - Texas Instruments |
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25 / 44 page ![]() Processor GND VDD VDD 1.8 V 1.8V Logic I/O SEL GND SPI PORT D1 D2 D3 D4 RAM CPU Peripherals 0.1µF EN S1B S2B S3B S4B FLASH Device #2 S1A S2A S3A S4A FLASH Device #1 MISO MOSI SCLK SS MISO MOSI SCLK SS VI/O 3.3 V 3.3 V 25 TMUX1574 www.ti.com SCDS391C – OCTOBER 2018 – REVISED DECEMBER 2019 Product Folder Links: TMUX1574 Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The TMUX15xx family offers high-speed system performance across a wide operating supply (1.5 V to 5.5 V) and operating temperature (-40°C to +125°C). The TMUX1574 supports a number of features that improve system performance such as 1.8 V logic compatibility, supports input voltages beyond supply, Fail-Safe Logic, and Powered-off Protection up to 3.6 V. These features make the TMUX15xx a family of protection multiplexers and switches that can reduce system complexity, board size, and overall system cost. 9.2 Typical Application Common applications that require the features of the TMUX1574 include multiplexing various protocols from a possessor or MCU such as SPI, JTAG, or standard GPIO signals. The TMUX1574 provides superior isolation performance when the device is powered. The added benefit of powered-off protection allows a system to minimize complexity by eliminating the need for power sequencing in hot-swap and live insertion applications. The example shown in Figure 42 illustrates the use of the TMUX1574 to multiplex an SPI bus to multiple flash memory devices. Figure 42. Multiplexing Flash Memory 9.2.1 Design Requirements For this design example, use the parameters listed in Table 2. Table 2. Design Parameters PARAMETERS VALUES Supply (VDD) 3.3 V Input / Output signal range 0 V to 3.3 V Control logic thresholds 1.8 V compatible |
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