5

TMUX1574

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SCDS391C – OCTOBER 2018 – REVISED DECEMBER 2019

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Copyright © 2018–2019, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.

(3)

All voltages are with respect to ground, unless otherwise specified.

6 Specifications

6.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted).

(1) (2) (3)

MIN

MAX

UNIT

VDD

Supply voltage

–0.5

6

V

VSEL or VEN

Logic control input pin voltage (SEL or EN)

–0.5

6

V

ISEL or IEN

Logic control input pin current (SEL or EN)

–30

30

mA

VS or VD

Source or drain pin voltage

–0.5

6

V

IS or ID (CONT)

Source and drain pin continuous current: (SxA, SxB, Dx)

–25

25

mA

Tstg

Storage temperature

–65

150

°C

TJ

Junction temperature

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human body model (HBM), per ANSI/ESDA/JEDEC JS-

001(1)

±2000

V

Charged-device model (CDM), per JEDEC specification

JESD22-C101(2)

±750

(1)

Device input and output can operate up to VDD x 2, with a maximum input and output voltage of 5.5 V.

(2)

VS_off and VD_off refers to the voltage at the source or drain pins when supply is less than 1.5 V.

6.3 Recommended Operating Conditions

MIN

MAX

UNIT

VDD

Supply voltage

1.5

5.5

V

VS or VD

Signal path input/output voltage (source or drain pin), VDD ≥ 1.5 V

(1)

0

VDD x 2

V

VS_off or VD_off

Signal path input/output voltage (source or drain pin), VDD < 1.5 V

(2)

0

3.6

V

VSEL or VEN

Logic control input voltage (EN, SEL)

0

5.5

V

TA

Ambient temperature

–40

125

ºC

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

6.4 Thermal Information

THERMAL METRIC(1)

DEVICE

DEVICE

DEVICE

UNIT

PW (TSSOP)

DYY (SOT-23)

RSV (UQFN)

16 PINS

16 PINS

16 PINS

RθJA

Junction-to-ambient thermal resistance

117.4

123.0

129.2

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

47.9

70.5

69.7

°C/W

RθJB

Junction-to-board thermal resistance

63.7

50.4

58.7

°C/W

ΨJT

Junction-to-top characterization parameter

6.9

5.0

3.6

°C/W

ΨJB

Junction-to-board characterization parameter

63.1

50.3

56.8

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

N/A

N/A

N/A

°C/W