VDD

0 V

tBBM 1

90%

Output

0 V

tOPEN (BBM) = min ( tBBM 1, tBBM 2)

tBBM 2

VSEL

tr < 5ns

tf < 5ns

GND

VDD

VDD

0.1 F

VS

OUTPUT

RL

CL

S1A

D1

S1B

VS

OUTPUT

RL

CL

S4A

D4

S4B

VSEL

SEL

GND

VDD

0 V

Supply

Ramp

(VDD)

1.5 V

1.5 V

tON (VDD)

tOFF (VDD)

90%

90%

OUTPUT

0 V

VDD

VDD

0.1 F

VDD

VS

OUTPUT

RL

CL

S1A

D1

S1B

VS

OUTPUT

RL

CL

S4A

D4

S4B

EN

17

TMUX1574

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SCDS391C – OCTOBER 2018 – REVISED DECEMBER 2019

Product Folder Links: TMUX1574

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Copyright © 2018–2019, Texas Instruments Incorporated

7.7 tON (VDD) and tOFF (VDD) Time

The tON (VDD) time is defined as the time taken by the output of the device to rise to 90% after the supply has

risen past the supply threshold. The 90% measurement is used to provide the timing of the device turning on in

the system. Figure 33 shows the setup used to measure turn on time, denoted by the symbol tON (VDD).

the tOFF (VDD) time is defined as the time taken by the output of the device to fall to 90% after the supply has fallen

past the supply threshold. The 90% measurement is used to provide the timing of the device turning off in the

system. Figure 33 shows the setup used to measure turn off time, denoted by the symbol tOFF (VDD).

Figure 33. tON (VDD) and tOFF (VDD)Time Measurement Setup

7.8 Break-Before-Make Delay

Break-before-make delay is a safety feature that prevents two inputs from connecting when the device is

switching. The output first breaks from the on-state switch before making the connection with the next on-state

switch. The time delay between the break and the make is known as break-before-make delay. Figure 34 shows

the setup used to measure break-before-make delay, denoted by the symbol tOPEN(BBM).

Figure 34. Break-Before-Make Delay Measurement Setup