PM7367 datasheet(108/323 Pages) PMC

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PM7367 FREEDM-32P32

DATA SHEET

PMC-1991499

ISSUE 2

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE

RD[27:24] has been sampled low and sampled high by rising edges of the

corresponding RCLK[27:24] inputs, and is set low when this register is read.

RLGA[7]:

The receive link group #7 active bit (RLGA[7]) monitors for transitions on the

RD[31:28] and RCLK[31:28] inputs. RLGA[7] is set high when each of

RD[31:28] has been sampled low and sampled high by rising edges of the

corresponding RCLK[31:28] inputs, and is set low when this register is read.

TLGA[0]:

The transmit link group #0 active bit (TLGA[0]) monitors for low to high

transitions on the TCLK[3:0] inputs. TLGA[0] is set high when rising edges

have been observed on all the signals on the TCLK[3:0] inputs, and is set low

when this register is read.

TLGA[1]:

The transmit link group #1 active bit (TLGA[1]) monitors for low to high

transitions on the TCLK[7:4] inputs. TLGA[1] is set high when rising edges

have been observed on all the signals on the TCLK[7:4] inputs, and is set low

when this register is read.

TLGA[2]:

The transmit link group #2 active bit (TLGA[2]) monitors for low to high

transitions on the TCLK[11:8] inputs. TLGA[2] is set high when rising edges

have been observed on all the signals on the TCLK[11:8] inputs, and is set

low when this register is read.

TLGA[3]:

The transmit link group #3 active bit (TLGA[3]) monitors for low to high

transitions on the TCLK[15:12] inputs. TLGA[3] is set high when rising edges

have been observed on all the signals on the TCLK[15:12] inputs, and is set

low when this register is read.

TLGA[4]:

The transmit link group #4 active bit (TLGA[4]) monitors for low to high

transitions on the TCLK[19:16] inputs. TLGA[4] is set high when rising edges

have been observed on all the signals on the TCLK[19:16] inputs, and is set

low when this register is read.

TLGA[5]:

The transmit link group #5 active bit (TLGA[5]) monitors for low to high

transitions on the TCLK[23:20] inputs. TLGA[5] is set high when rising edges

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