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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC16F631 датащи(PDF) 207 Page - Microchip Technology |
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PIC16F631 датащи(HTML) 207 Page - Microchip Technology |
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207 / 294 page  © 2007 Microchip Technology Inc. DS41262D-page 205 PIC16F631/677/685/687/689/690 14.3.2 TMR0 INTERRUPT An overflow (FFh → 00h) in the TMR0 register will set the T0IF (INTCON<2>) bit. The interrupt can be enabled/disabled by setting/clearing T0IE (INTCON<5>) bit. See Section 5.0 “Timer0 Module” for operation of the Timer0 module. 14.3.3 PORTA/PORTB INTERRUPT An input change on PORTA or PORTB change sets the RABIF (INTCON<0>) bit. The interrupt can be enabled/ disabled by setting/clearing the RABIE (INTCON<3>) bit. Plus, individual pins can be configured through the IOCA or IOCB registers. FIGURE 14-7: INTERRUPT LOGIC Note: If a change on the I/O pin should occur when the read operation is being executed (start of the Q2 cycle), then the RABIF interrupt flag may not get set. See Section 4.2.3 “Interrupt-on-change” for more information. C1IF C1IE T0IF T0IE INTF INTE RABIF RABIE GIE PEIE Wake-up (If in Sleep mode)(1) Interrupt to CPU EEIE EEIF ADIF ADIE IOC-RA0 IOCA0 IOC-RA1 IOCA1 IOC-RA2 IOCA2 IOC-RA3 IOCA3 IOC-RA4 IOCA4 IOC-RA5 IOCA5 CCP1IF CCP1IE OSFIF OSFIE C2IF C2IE IOC-RB4 IOCB4 IOC-RB5 IOCB5 IOC-RB6 IOCB6 IOC-RB7 IOCB7 RCIF RCIE TMR2IE TMR2IF SSPIE SSPIF TXIE TXIF TMR1IE TMR1IF Note 1: Some peripherals depend upon the system clock for operation. Since the system clock is suspended during Sleep, these peripherals will not wake the part from Sleep. See Section 14.6.1 “Wake-up from Sleep”. |
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