C200 datasheet(40/82 Pages) INTEL

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Specification Clarifications

Specification Update

d. Table 2-13 is modified as shown:

19.

t203 Deep S3/S4 Exit Clarification

The following note is added to t203 in table 8-37:

Timing does not apply after Deep S3/S4 exit when Intel ME has configured SLP_S5#

and/or SLP_S4# to rise with SLP_A#.

20.

RAID 1 Description

The second bullet of section 5.16.7 Intel® Rapid Storage Technology Configuration is

changed to:

Data redundancy is offered through RAID Level 1, which performs mirroring.

21.

V_PROC_IO Definition

Table 2-26 Power and Ground Signals is modified as shown:

22.

Manageability Signals Clarifications

The following replaces section 2.25:

2.25 Manageability Signals

The following signals can be optionally used by Intel Management Engine supported

applications and appropriately configured by Intel Management Engine firmware. When

configured and used as a manageability function, the associated host GPIO

functionality is no longer available. If the manageability function is not used in a

platform, the signal can be used as a host General Purpose I/O or a native function.

Name

Type

Description

RTCRST#

RTC Reset: When asserted, this signal resets register bits in the RTC

well.

NOTES:

Unless CMOS is being cleared (only to be done in the G3 power

state), the RTCRST# input must always be high when all other

RTC power planes are on.

In the case where the RTC battery is dead or missing on the

platform, the RTCRST# pin must rise before the DPWROK pin.

Name

Description

VccDMI

Power supply for DMI. For 3rd generation Intel® Core™ processors-based

platforms, this supply can be connected to the PCH VccIO. For 2nd generation

Intel® Core™ processors-based platforms, this supply must be connected to

the same supply as the processor I/O voltage.

V_PROC_IO

This supply is used to drive the processor interface signals. For 3rd generation

Intel® Core™ processors-based platforms, this supply can be connected to

the PCH VccIO. For 2nd generation Intel® Core™ processors-based platforms,

this supply must be connected to the same supply as the processor I/O

voltage.

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