AX88796ALF datasheet(30/68 Pages) ASIX

30 / 68 page

AX88796ALF

3-in-1 Local Bus Fast Ethernet Controller

Destination Address 0 (DA0)

Destination Address 1 (DA1)

Destination Address 2 (DA2)

Destination Address 3 (DA3)

Destination Address 4 (DA4)

Destination Address 5 (DA5)

Source Address 0 (SA0)

Source Address 1 (SA1)

Source Address 2 (SA2)

Source Address 3 (SA3)

Source Address 4 (SA4)

Source Address 5 (SA5)

Type / Length 0

Type / Length 1

Data 0

Data 1

…

WTS = 0 in Data Configuration Register.

This format is used with ISA, 80186 or MCS-51 Mode.

Note: All examples above will result in a transmission of a packet in order of DA0 (Destination Address 0),

DA1, DA2, DA3 . . . in byte. Bits within each byte will be transmitted least significant bit first.

4.2.3

Filling Packet to Transmit Buffer (Host fill data to memory)

The Remote DMA channel is used to both assembles packets for transmission, and to remove received packets

from the Receive Buffer Ring. It may also be used as a general-purpose slave DMA channel for moving blocks

of data or commands between host memory and local buffer memory. There are two modes of operation,

Remote Write and Remote Read Packet.

Two register pairs are used to control the Remote DMA, a Remote Start Address (RSAR0, RSAR1) and a

Remote Byte Count (RBCR0, RBCR1) register pair. The Start Address Register pair points to the beginning of

the block to be moved while the Byte Count Register pair is used to indicate the number of bytes to be

transferred. Full handshake logic is provided to move data between local buffer memory (Embedded Memory)

and a bi-directional I/O port.

REMOTE WRITE

A Remote Write transfer is used to move a block of data from the host into local buffer memory. The Remote

DMA will read data from the I/O port and sequentially write it to local buffer memory beginning at the Remote

Start Address. The DMA Address will be incremented and the Byte Counter will be decremented after each

transfer. The DMA is terminated when the Remote Byte Count Register reaches a count of zero.

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