поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

STM32F101X6 датащи(PDF) 47 Page - STMicroelectronics

номер детали STM32F101X6
подробное описание детали  Access line, advanced ARM-based 32-bit MCU with Flash memory, six 16-bit timers, ADC and seven communication interfaces
PDF  64 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F101X6 датащи(HTML) 47 Page - STMicroelectronics

Back Button STM32F101X6 Datasheet HTML 43Page - STMicroelectronics STM32F101X6 Datasheet HTML 44Page - STMicroelectronics STM32F101X6 Datasheet HTML 45Page - STMicroelectronics STM32F101X6 Datasheet HTML 46Page - STMicroelectronics STM32F101X6 Datasheet HTML 47Page - STMicroelectronics STM32F101X6 Datasheet HTML 48Page - STMicroelectronics STM32F101X6 Datasheet HTML 49Page - STMicroelectronics STM32F101X6 Datasheet HTML 50Page - STMicroelectronics STM32F101X6 Datasheet HTML 51Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 47 / 64 page
background image
STM32F101xx
Electrical characteristics
47/64
5.3.13
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, RPU (see Table 29).
Unless otherwise specified, the parameters given in Table 32 are derived from tests
performed under ambient temperature and VDD supply voltage conditions summarized in
Table 7.
Figure 16.
Recommended NRST pin
protection
1.
The reset network protects the device against parasitic resets.
2.
The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in
Table 32. Otherwise the reset will not be taken into account by the device.
Table 32.
NRST pin characteristics(1)
1.
TBD stands for to be determined.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL(NRST)
NRST Input low level voltage
–0.5
0.8
V
VIH(NRST)
NRST Input high level voltage
2
VDD+0.5
Vhys(NRST)
NRST Schmitt trigger voltage
hysteresis
200
RPU
Weak pull-up equivalent resistor(2)
2.
The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to
the series resistance must be minimum
(~10% order)
.
VIN = VSS
30
40
50
k
Ω
VF(NRST)
NRST Input filtered pulse(3)
3.
Values guaranteed by design, not tested in production.
100
ns
VNF(NRST) NRST Input not filtered pulse
(3)
300
µs
ai14132b
STM32F101xx
RPU
NRST
VDD
FILTER
Internal Reset
0.1 µF
External
reset circuit



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com