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TDA5345HT датащи(PDF) 35 Page - NXP Semiconductors |
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TDA5345HT датащи(HTML) 35 Page - NXP Semiconductors |
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35 / 44 page ![]() 1999 June 10 35 Philips Semiconductors Preliminary specification 5 V spindle & VCM driver combo TDA5345HT ELECTRICAL CHARACTERISTICS (Condition: VDD5 = 4.5-5.5 V; TAMB = 0-85 °C; unless otherwise specified); GBD means Guaranted by Design. 1. Supply current 1-1 Analog and power supply (pin 4, 14, 63, 24, 56together) when there is no current in spindle & VCM motors 1-2 digital supply (Vdd5Dig) 2. DIGITAL section 2-1 Inputs / Outputs (3.3 V regulator ENABLED !) 2-2 16-bit serial interface SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. Unit ISleep sleep current all Sleep bits = ‘1’ 1.1 mA ISleep1 sleep mode 1 current only Spindle is active 8.8 mA ISleep2 sleep mode 2 current only ShockSen is active 2.7 mA ISleep3 sleep mode 3 current only -3 V reg is active 8 mA ISleep4 sleep mode 4 current only DAC12 is active 4.4 mA ISleep5 sleep mode 5 current only DAC12 & VCM are active 9 mA ISupply supply current all sections are active 25.5 mA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. Unit ISleep sleep current spinSleep bits = ‘1’ 56 µA/MHz ISupply supply current spinSleep bits = ‘0’ 78 µA/MHz SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VIH high level input voltage 2.0 V VIL low level input voltage 0.8 V VOH high level output voltage (IOUT = 100 µA) V3v3-0.5 V VOL low level output voltage (IOUT = 100 µA) 0.4 V tr/f rise/Fall time C = 20 pF, GbD 20 ns IIN input leakage current +/- 1 µA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT. fSCLK serial Clock GbD 33 MHz δSCLK serial Clock duty cycle GbD 30 50 70 % trSCLK serial Clock rise time GbD 10 ns tfSCLK serial Clock fall time GbD 10 ns tSTART chip Select to first Active clock edge GbD TSCLK/2 ns tSU data to clock setup time GbD 8 ns |
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