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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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S71PL129JC0 датащи(PDF) 82 Page - SPANSION |
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S71PL129JC0 датащи(HTML) 82 Page - SPANSION |
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82 / 153 page  This document contains information on one or more products under development at Spansion LLC. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion LLC reserves the right to change or discontinue work on this proposed product without notice. Publication Number S71PL129Jxx_00 Revision A Amendment 8 Issue Date October 28, 2005 Features Single power supply voltage of 2.6 to 3.3 V Direct TTL compatibility for all inputs and outputs Deep power-down mode: Memory cell data invalid Page operation mode: — Page read operation by 8 words Logic compatible with SRAM R/W pin Standby current — Standby = 70 µA (32M) — Standby = 100 µA (64M) — Deep power-down Standby = 5 µA Access Times Pin Description pSRAM Type 6 2M Word by 16-bit CMOS Pseudo Static RAM (32M) 4M Word by 16-bit CMOS Pseudo Static RAM (64M ) ADVANCE INFORMATION 32M 64M Access Time 70 ns CE1# Access Time 70 ns OE# Access Time 25 ns Page Access Time 30 ns Pin Name Description A0 to A21 Address Inputs A0 to A2 Page Address Inputs I/O1 to I/O16 Data Inputs/Outputs CE1# Chip Enable Input CE2 Chip select Input WE# Write Enable Input OE# Output Enable Input LB#,UB# Data Byte Control Inputs VDD Power Supply GND Ground NC Not Connection |
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