LAN8804 datasheet(17/91 Pages) MICROCHIP

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LAN8804

DS00003591G-page 17

General Purpose

I/O

GPIO[23:0]

VIS/VO12/

VOD12/

SRL

(PU)

General purpose I/O.

These I/Os are shared with various other functions. Buffer type

and alternate function selection is configured via GPIO regis-

ters.

System Reset

RESET_N

VIS

(PU)

Chip reset (active low).

At power-up, RESET_N must not be deasserted until all power

and clocks have been stable for the specified minimum dura-

tion.

Hardware pin configurations are strapped-in at the de-asser-

tion (rising edge) of RESET_N. See the Configuration Strap

Input Pins section for details.

Port 0 LED 1

PORT0LED1

VO12/

VOD12/

VOS12

Programmable Port 0 LED 1 output.

The polarity of this pin depends on the

PORT0_LED1_POL

configuration strap which is shared with this pin.

Port 0 LED 2

PORT0LED2

VO12/

VOD12/

VOS12

Programmable Port 0 LED 2 output.

The polarity of this pin depends on the

PORT0_LED2_POL

configuration strap which is shared with this pin.

Port 1 LED 1

PORT1LED1

VO12/

VOD12/

VOS12

Programmable Port 1 LED 1 output.

The polarity of this pin depends on the

PORT1_LED1_POL

configuration strap which is shared with this pin.

Port 1 LED 2

PORT1LED2

VO12/

VOD12/

VOS12

Programmable Port 1 LED 2 output.

The polarity of this pin depends on the

PORT1_LED2_POL

configuration strap which is shared with this pin.

Port 2 LED 1

PORT2LED1

VO12/

VOD12/

VOS12

Programmable Port 2 LED 1 output.

The polarity of this pin depends on the

PORT2_LED1_POL

configuration strap which is shared with this pin.

TABLE 3-5:

MISCELLANEOUS PINS (CONTINUED)

Name

Symbol

Buffer

Type

Description

Symbol

Buffer Type

Description

VIS/

VO12/

VOD12

(PU)

SRL

(PU)

GPIO[0:2]

with internal 50 ohm termination

GPIO[3:6]

GPIO[7:10]

with internal 50 ohm termination

GPIO[11:14]

GPIO[15:16]

with internal 50 ohm termination

GPIO[17:20]

GPIO[21]

with internal 50 ohm termination

GPIO[22]

GPIO[23]

with internal 50 ohm termination

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