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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC8555CPXAPF датащи(PDF) 55 Page - Freescale Semiconductor, Inc |
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MPC8555CPXAPF датащи(HTML) 55 Page - Freescale Semiconductor, Inc |
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55 / 88 page  MPC8555E PowerQUICC™ III Integrated Communications Processor Hardware Specifications, Rev. 4 Freescale Semiconductor 55 Package and Pin Listings Figure 39 shows the PCI input AC timing conditions. Figure 39. PCI Input AC Timing Measurement Conditions Figure 40 shows the PCI output AC timing conditions. Figure 40. PCI Output AC Timing Measurement Condition 14 Package and Pin Listings This section details package parameters, pin assignments, and dimensions. 14.1 Package Parameters for the MPC8555E FC-PBGA The package parameters are as provided in the following list. The package type is 29 mm × 29 mm, 783 flip chip plastic ball grid array (FC-PBGA). Die size 8.7 mm × 9.3 mm × 0.75 mm Package outline 29 mm × 29 mm Interconnects 783 Pitch 1 mm Minimum module height 3.07 mm Maximum module height 3.75 mm Solder Balls 62 Sn/36 Pb/2 Ag Ball diameter (typical) 0.5 mm tPCIVKH CLK Input tPCIXKH CLK Output Delay tPCKHOV High-Impedance tPCKHOZ Output |
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