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33889 датащи(PDF) 20 Page - Freescale Semiconductor, Inc

номер детали 33889
подробное описание детали  System Basis Chip with Low Speed Fault Tolerant CAN Interface
PDF  60 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

33889 датащи(HTML) 20 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
20
Freescale Semiconductor
33889
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Loop time Tx to Rx, no bus failure, MC33889D only ((27),
Figure 5) (ISO ICT test series 10)
Tx high to low transition (dominant edge)
Tx low to high transition (recessive edge)
tLOOPRD
1.15
1.45
1.5
1.5
µs
Loop time Tx to Rx, with bus failure, MC33889D only ((27),
Figure 6) (ISO ICT test series 10)
Tx high to low transition (dominant edge)
Tx low to high transition (recessive edge)
tLOOPRD-F
-
-
1.9
1.9
µs
Loop time Tx to Rx, with bus failure and +-1.5V gnd shift, 5
nodes network, MC33889D,((28), Figure 7, ISO ICT tests
series 11)
tLOOPRD/DR-F+GS
3.6
µs
Min. Dominant Time For Wake-up On CANL or CANH
(Term Vbat; VSUP = 12V) Guaranteed by design.
MC33889B
MC33889D
tWAKE
8.0
30
16
30
µs
Failure 3 Detection Time (Normal Mode)
tDF3
10
30
80
µs
Failure 3 Recovery Time (Normal Mode)
tDR3
160
µs
Failure 6 Detection Time (Normal Mode)
tDF6
50
200
500
µs
Failure 6 Recovery Time (Normal Mode)
tDR6
150
200
1000
µs
Failure 4, 7 Detection Time (Normal Mode)
tDF47
0.75
1.5
4.0
ms
Failure 4, 7 Recovery Time (Normal Mode)
tDR47
10
30
60
µs
Failure 3a, 8 Detection Time (Normal Mode)
tDF8
0.75
1.7
4.0
ms
Failure 3a, 8 Recovery Time (Normal Mode)
tTDR8
0.75
1.5
4.0
ms
Failure 4, 7 Detection Time, (Term VBAT; VSUP = 12 V)
tDR47
0.8
1.2
8.0
ms
Failure 4, 7 Recovery Time (Term VBAT; VSUP = 12 V)
tDR47
1.92
ms
Failure 3 Detection Time (Term VBAT; VSUP = 12 V)
tDR3
3.84
ms
Failure 3 Recovery Time (Term VBAT; VSUP = 12 V)
tDR3
1.92
ms
Failure 3a, 8Detection Time (Term VBAT; VSUP = 12 V)
tDR8
2.3
ms
Failure 3a, 8 Recovery Time (Term VBAT; VSUP = 12 V)
tDR8
1.2
ms
Notes
27.
AC characteristic according to ISO11898-3, tested per figure 5 and 6. Guaranteed by design, room temperature only.
28.
AC characteristic according to ISO11898-3, tested per figure 7. Max reported is the typical measurement under the worst condition
(gnd shift, dominant/recessive edge, at source or destination node. ref to ISO test specification). Guaranteed by design, room
temperature only.
Table 5. Dynamic Electrical Characteristics (continued)
VSUP From 5.5 V to 18 V, V2INT from 4.75 to 5.25 V and TJ from -40°C to 150°C unless otherwise noted. Typical values
noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
Conditions
Symbol
Min
Typ
Max
Unit



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