TSL2585 datasheet(49/86 Pages) OSRAM

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Page 48

Datasheet, Public

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[v4-00] 2022-Dec-22

TSL2585 − Register O ver view

MEAS_SEQR_RESIDUAL_1_AND_WAIT Register

Figure 62:

MEAS_SEQR_RESIDUAL_1_AND_WAIT

Note(s):

1. Return to the Register Map (0xD3).

Addr: 0xD3

MEAS_SEQR_RESIDUAL_1_AND_WAIT

Bit

Field

Reset

Type

Bit Description

7:4

MEASUREMENT_

SEQUENCER_

WAIT_PATTERN

0x1

R/W

Defines if a sequencer step will wait for the

modulator trigger timer to finish as programmed in

MOD_TRIGGER_TIMING and WTIME. At the same

time the timer is restarted. In case this bit is not set,

the next sequencer step will start as soon as all

measurements in the prior step are completed.

Please observe that MOD_TRIGGER_TIMING is “0” by

default. In this case the programmed wait pattern is

ignored since measurement time has always priority

over wait time.

The bit pattern does not represent a value but

controls bitwise which sequencer step shall be used.

The leftmost position of “0000” refers to sequencer

step 3, the rightmost refers to sequencer step 0. By

default the wait is executed for sequencer step 3

(last sequencer step).

3:0

MEASUREMENT_

SEQUENCER_MOD2_

RESIDUAL_ENABLE_

PATTERN

0xF

R/W

Defines if a residual measurement on modulator 2

shall be executed. The bit pattern does not represent

a value but controls bitwise which sequencer step

shall be used. The leftmost position of “0000” refers

to sequencer step 3, the rightmost refers to

sequencer step 0. By default a residual measurement

is done in all sequencer steps.

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