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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TSL2585 датащи(PDF) 63 Page - OSRAM GmbH |
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TSL2585 датащи(HTML) 63 Page - OSRAM GmbH |
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63 / 86 page  Page 62 Datasheet, Public Document Feedback [v4-00] 2022-Dec-22 TSL2585 − Register O ver view VSYNC Period Registers Figure 81: VSYNC Period Note(s): 1. Return to the Register Map (0xF2, 0xF3). VSYNC_PERIOD_TARGET Registers Figure 82: VSYNC_PERIOD_TARGET Note(s): 1. Return to the Register Map (0xF4, 0xF5). Addr Bit Field Reset Type Description 0xF2 7:0 VSYNC_PERIOD[7:0] 0R/W VSYNC Period Contains the measured VSYNC in multiples of 1.3888μs Reading this register clears HOLD_VSYNC_PERIOD 0xF3 7:0 VSYNC_PERIOD[15:8] 0R/W Addr Bit Field Reset Type Description 0xF4 7:0 VSYNC_PERIOD_ TARGET[7:0] 0R/W VSYNC Period Target Defines the ideal target value for the VSYNC_PERIOD. Configure properly before enabling the oscillator calibration, otherwise it will cause malfunction or overflow. See VSYNC_PERIOD_USE_FAST_TIMING_EVAL for the calculation of VSYNC_PERIOD_TARGET. 0xF5 6:0 VSYNC_PERIOD_ TARGET[14:8] 0R/W 0xF5 7 VSYNC_ PERIOD_USE_ FAST_TIMING_ EVAL 0R/W If set to “0”, the VSYNC_PERIOD_TARGET shall match VSYNC_PERIOD[15:1], supports range from 15Hz to 500Hz. VSYNC_PERIOD_TARGET = (720KHz / fVSYNC)/2 e.g. for fVSYNC = 60Hz, VSYNC_PERIOD_TARGET = 0x1770 If set to “1”, the VSYNC_PERIOD_TARGET shall match VSYNC_PERIOD[14:0], supports range from 30Hz to 1KHz. VSYNC_PERIOD_TARGET = 720KHz / fVSYNC e.g. for fVSYNC = 60Hz, VSYNC_PERIOD_TARGET = 0x2EE0 |
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