TMD2621 datasheet(11/59 Pages) OSRAM

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[v4-00] 2023-Apr-12

TMD2621 − Detailed Description

I²C Protocol

The device uses I²C serial communication protocol for

communication. The device supports 7-bit chip addressing and

both standard and fast clock frequency modes. Read and write

transactions comply with the standard set by Philips (now NXP).

Internal to the device, an 8-bit buffer stores the register address

location of the desired byte to read or write. This buffer

auto-increments upon each byte transfer and is retained

between transaction events (i.e. valid even after the master

issues a STOP command and the I²C bus is released). During

consecutive Read transactions, the future/repeated I²C Read

transaction may omit the memory address byte normally

following the chip address byte; the buffer retains the last

I²C Write Transaction

A Write transaction consists of a START, CHIP-ADDRESSWRITE,

byte (9TH clock pulse) the slave places an ACKNOWLEDGE/

NOT-ACKNOWLEDGE (ACK/NACK) on the bus. If NACK is

transmitted by the slave, the master may issue a STOP.

I²C Read Transaction

A Read transaction consists of a START, CHIP-ADDRESSWRITE,

and STOP. Following all but the final byte the master places an

ACK on the bus (9TH clock pulse). Termination of the Read

transaction is indicated by a NACK being placed on the bus by

the master, followed by STOP.

Alternately, if the previous I²C transaction was a Read, the

internal register address buffer is still valid, allowing the

transaction to proceed without “re”-specifying the register

address. In this case the transaction consists of a START,

CHIP-ADDRESSREAD, DATA BYTE(S), and STOP. Following all but

the final byte the master places an ACK on the bus (9TH clock

pulse). Termination of the Read transaction is indicated by a

NACK being placed on the bus by the master, followed by STOP.

The I²C bus protocol was developed by Philips (now NXP). For

a complete description of the I²C protocol, please review the

NXP I²C design specification at:

https://www.i2c-bus.org/references/

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