| поискавой системы для электроныых деталей |
|
PCK2010DL датащи(PDF) 6 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
PCK2010DL датащи(HTML) 6 Page - NXP Semiconductors |
|
6 / 16 page ![]() Philips Semiconductors Preliminary specification PCK2010 CK98 (100/133MHz) Spread Spectrum System Clock Generator 1999 Mar 01 6 CLOCK ENABLE CONFIGURATION CPUSTOP PWRDWN PCISTOP CPUCLK CPUDIV2 APIC 3V66 PCI PCIF REF 48MHz OSC VCOs X 0 X LOW LOW LOW LOW LOW LOW LOW OFF OFF 0 1 0 LOW ON ON LOW LOW ON ON ON ON 0 1 1 LOW ON ON LOW ON ON ON ON ON 1 1 0 ON ON ON ON LOW ON ON ON ON 1 1 1 ON ON ON ON ON ON ON ON ON NOTES: 1. LOW means outputs held static LOW as per latency requirement below 2. ON means active. 3. PWRDWN pulled LOW, impacts all outputs including REF and 48MHz outputs. 4. All 3V66 clocks as well as CPU clocks should stop cleanly when CPUSTOP is pulled LOW. 5. CPUDIV2, IOAPIC, REF, 48MHz signals are not controlled by the CPUSTOP functionality and are enabled all in all conditions except when PWRDWN is LOW. POWER MANAGEMENT REQUIREMENTS SG SG S LATENCY SIGNAL SIGNAL STATE NO. OF RISING EDGES OF FREE RUNNING PCICLK CPUSTOP 0 (DISABLED) 1 1 (ENABLED) 1 PCISTOP 0 (DISABLED) 1 1 (ENABLED) 1 PWRDWN 1 (NORMAL OPERATION) 3ms 0 (POWER DOWN) 2 MAX NOTES: 1. Clock ON/OFF latency is defined as the number of rising edges of free running PCICLKs between the clock disable goes HIGH/LOW to the first valid clock that comes out of the device. 2. Power up latency is when PWRDWN goes inactive (HIGH) to when the first valid clocks are driven from the device. ABSOLUTE MAXIMUM RATINGS1, 2 In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to VSS (VSS = 0V) SYMBOL PARAMETER CONDITION LIMITS UNIT SYMBOL PARAMETER CONDITION MIN MAX UNIT VDD3 DC 3.3V core supply voltage –0.5 +4.6 V VDDQ3 DC 3.3V I/O supply voltage –0.5 +4.6 V VDDQ2 DC 2.5V I/O supply voltage –0.5 +3.6 V IIK DC input diode current VI < 0 –50 mA VI DC input voltage Note 2 –0.5 5.5 V IOK DC output diode current VO > VCC or VO < 0 ±50 mA VO DC output voltage Note 2 –0.5 VCC + 0.5 V IO DC output source or sink current VO = 0 to VCC ±50 mA TSTG Storage temperature range –65 +150 °C PTOT Power dissipation per package plastic medium-shrink (SSOP) For temperature range: –40 to +125 °C above +55 °C derate linearly with 11.3mW/K 850 mW NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. |
|
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |