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ST10F276 датащи(PDF) 204 Page - STMicroelectronics

номер детали ST10F276
подробное описание детали  16-bit MCU with MAC unit, 832 Kbyte Flash memory and 68 Kbyte RAM
PDF  229 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
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ST10F276 датащи(HTML) 204 Page - STMicroelectronics

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Electrical characteristics
ST10F276
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Figure 56.
External clock drive XTAL1
Note:
When Direct Drive is selected, an external clock source can be used to drive XTAL1. The
maximum frequency of the external clock source depends on the duty cycle: When 64 MHz
is used, 50% duty cycle is granted (low phase = high phase = 7.8ns); when for instance
32 MHz is used, a 25% duty cycle can be accepted (minimum phase, high or low, again
equal to 7.8ns).
23.8.16
Memory cycle variables
The tables below use three variables which are derived from the BUSCONx registers and
represent the special characteristics of the programmed memory cycle. The following table
describes how these variables are computed.
Table 102.
External clock drive timing
Symbol
Parameter
Direct drive
fCPU = fXTAL
Direct drive with
prescaler
fCPU = fXTAL / 2
PLL usage
fCPU = fXTAL x F
Unit
Min.
Max.
Min.
Max.
Min.
Max.
tOSCSR
XTAL1 period(1) (2)
1.
The minimum value for the XTAL1 signal period is considered as the theoretical minimum. The real
minimum value depends on the duty cycle of the input clock signal.
2.
4-12 MHz is the input frequency range when using an external clock source. 64 MHz can be applied with
an external clock source only when Direct Drive mode is selected: In this case, the oscillator amplifier is
bypassed so it does not limit the input frequency.
15.625
–
83.3
250
83.3
250
ns
t1 SR
High time(3)
3.
The input clock signal must reach the defined levels VIL2 and VIH2.
6
–3
–6–
t2 SR
Low time(3)
t3 SR
Rise time(3)
–2–
2–2
t4 SR
Fall time(3)
t1
t3
t4
VIL2
t2
tOSC
VIH2
Table 103.
Memory cycle variables
Symbol
Description
Values
tA
ALE extension
TCL x [ALECTL]
tC
Memory cycle time wait states
2TCL x (15 - [MCTC])
tF
Memory tri-state time
2TCL x (1 - [MTTC])



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