ST10F276 datasheet(207/229 Pages) STMICROELECTRONICS

номер детали	ST10F276

подробное описание детали	16-bit MCU with MAC unit, 832 Kbyte Flash memory and 68 Kbyte RAM

PDF	229 Pages

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производитель	STMICROELECTRONICS [STMicroelectronics]

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ST10F276

Electrical characteristics

207/229

t38

ALE falling edge to

Latched CS

– 4 – tA

10 – tA

– 4 – tA

10 – tA

t39

Latched CS low to valid

data In

–

16.5 + tC+ 2tA

–

3TCL– 21+ tC+ 2tA

t40

Latched CS hold after

RD, WR

27 + tF

–

3TCL – 10.5 + tF

–

t42

ALE fall. edge to RdCS,

WrCS (with RW delay)

7 + tA

TCL – 5.5 + tA

t43

ALE fall. edge to RdCS,

WrCS (no RW delay)

– 5.5 + tA

t44

Address float after

RdCS, WrCS (with RW

delay)1

–

1.5

–

1.5

t45

Address float after

RdCS, WrCS (no RW

delay)

TCL + 1.5

t46

RdCS to valid data In

(with RW delay)

4 + tC

2TCL – 21 + tC

t47

RdCS to valid data In

(no RW delay)

16.5 + tC

3TCL – 21 + tC

t48

RdCS, WrCS low time

(with RW delay)

15.5 + tC

–

2TCL – 9.5 + tC

–

t49

RdCS, WrCS low time

(no RW delay)

28 + tC

3TCL – 9.5 + tC

t50

CC Data valid to WrCS

10 + tC

2TCL – 15 + tC

t51

SR Data hold after RdCS

t52

Data float after RdCS

(1)

–

16.5 + tF

–

2TCL – 8.5 + tF

t54

Address hold after

RdCS, WrCS

6 + tF

–

2TCL – 19 + tF

–

t56

CC Data hold after WrCS

Partially tested, guaranteed by design characterization.

Table 104.

Multiplexed bus (continued)

Symbol

Parameter

FCPU = 40 MHz

TCL = 12.5ns

Variable CPU clock

1/2 TCL = 1 to 64 MHz

Min.

Max.

Min.

Max.

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