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CC1010-RTR1 датащи(PDF) 20 Page - Texas Instruments

номер детали CC1010-RTR1
подробное описание детали  Single Chip Very Low Power RF Transceiver with 8051-Compatible Microcontroller
PDF  152 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI - Texas Instruments

CC1010-RTR1 датащи(HTML) 20 Page - Texas Instruments

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CC1010
SWRS047
Page 20 of 152
15.3 Memory Map
The
CC1010 memory map is shown in
Figure 3.
CC1010 has 2 blocks of RAM on chip. This
includes the 128 bytes Internal RAM and
the 2048 bytes External RAM. (The 2048-
byte RAM will be referred to as External
RAM, although it is on-chip. Direct access
to off-chip RAM is not implemented.)
Access to the internal RAM is performed
using the MOV instruction. MOV A, @Ri,
MOV @Ri, A and MOV @Ri, #data use
indirect addressing. MOV A, direct,
MOV Rn, direct, MOV direct, A,
MOV
direct,
Rn, MOV
direct,
direct and MOV direct, #data use
direct addressing. MOV @Ri, direct
uses indirect and direct addressing.
All direct addressing instructions can also
be used to access the SFRs.
CC1010 also
implements the option to access SFRs
indirectly, as described in the In Circuit
Debugging section on page 44.
CC1010 has
dual data pointers to external RAM,
provided in the 16 bit registers DPTR0 and
DPTR1 (SFRs DPH0, DPL0, DPH1 and
DPL1). If a high-level language compilator
is used, it should be set up to make use of
both pointers for better performance. The
data pointer is selected through DPS.SEL.
Access to the external RAM is performed
using the MOVX instruction and indirect
addressing using either the 16 bit data
pointers or the 8 bit registers R0 or R1
together with MPAGE. MOVX A, @DPTR
and
MOVX
@DPTR,
A
moves data to (from) the accumulator,
from (to) the address pointed to by the
currently selected data pointer.
The instructions MOVX A, @Ri and MOVX
@Ri,
A
moves data to (from) the
accumulator, from (to) the address given
by the memory page address register
MPAGE and the register Ri (R0 or R1).
MPAGE gives the 8 most significant
address bits, while the register Ri gives
the 8 least significant bits. In many 8051
implementations, this type of external
RAM access is performed using P2 to give
the most significant address bits. Existing
software may therefore have to be
adapted to make use of MPAGE instead of
P2.
The program memory can be read using
the MOVC A, @A+DPTR and MOVC A,
@A+PC instructions, which moves a byte
from the program memory address given
by A+DPTR or A+PC respectively. The
program memory can not be written using
MOV commands, but uses the method
described in the 8051 Flash Programming
section on page 42.
CC1010 also provides a possibility to stretch
the access cycle to external RAM, through
CKCON.MD(2:0) (see page 55). The
default value for CKCON.MD is "001". It is
recommended to set CKCON.MD to "000"
for faster RAM access.



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