CC1010-RTR1 datasheet(40/152 Pages) TI

40 / 152 page

CC1010

SWRS047

Page 40 of 152

15.12.6 Write Program Memory Page

The

Write

Program

Memory

Page

instruction writes the 128 bytes buffered

through the Load Program Memory Page

instructions to Flash memory.

After issuing this command, wait 5.4 ms

for it to complete. It is also possible to use

the Read Program Memory instruction to

poll when the program memory has been

written. When writing is in progress, all

read instructions will return 0xFF. Reading

an address containing data different from

0xFF can then be used to check when the

write is completed.

15.12.7 Read Program Memory

The Flash program memory can be read

back byte by byte using the Read Program

Memory instruction. The data is returned

in byte 4 of the instruction.

Wait at least 9

⋅ TXOSC between the last

negative transition on SCK for byte 3

before issuing the first positive edge on

SCK for byte 4 to receive valid data.

15.12.8 Write Lock Bits

The reading (through SPI) and writing to

the Flash program memory can be

disabled by setting the lock bits as

described in this section. This should be

used for software protection.

The lock bits are set using the Write Lock

Bits instruction. A block of programmable

size at the top of the Flash program

memory can be locked for writing using

the

LSIZE

bits.

Page

can

independently locked for writing by using

the BBLOCK bit. Reading data through the

SPI interface can be disabled using the

SPIRE bit.

The detailed description of all lock bits is

given in Table 18.

Bit

Name

Function

7:3

Reserved, write as '0'

BBLOCK

Boot Block Lock

0 : Page 0 is write

protected

1 : Page 0 is writeable,

unless LSIZE is 000

3:1

LSIZE[2:0]

Lock Size, sets the size of

the upper Flash area which

is write protected. Byte

sizes and page numbers

are listed below:

000 : 32768 (All pages)

001 : 16384 (page 128-

255)

010 : 8192 (page 192-255)

011 : 4096 (page 224-255)

100 : 2048 (page 240-255)

101 : 1024 (page 248-255)

110 : 512 (page 252-255)

111 : 0 (no pages)

SPIRE

SPI Read Flash Enable /

Disable

0 : SPI Interface returns all

zeros on the Read

Program Memory

instruction

1 : SPI Interface returns

valid Flash data on the

Read Program Memory

instruction

Table 18. Flash Lock Bits

Lock bits can only be erased (set high) by

issuing the Chip Erase instruction. If

multiple Write Lock Bits instructions are

issued without chip erase in between,

each lock bit will be AND-ed together with

the previously written lock bits.

In effect, this means that it is not possible

to unlock the Flash program memory

without also erasing it.

The effect of the different lock size bits are

illustrated in Figure 6.

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