ATAM862 datasheet(63/110 Pages) ATMEL

63 / 110 page

4554E–4BMCU–05/06

ATAM862-3

23.3

Timer 3 Modulator/Demodulator Modes

23.3.1

Timer 3 – Mode 6:

Carrier Frequency Burst Modulation Controlled by Timer 2 Output Toggle Flip-flop (M2)

The Timer 3 counter is driven by an internal or external clock source. Its compare- and compare

mode registers must be programmed to generate the carrier frequency via the output toggle

flip-flop. The output toggle flip-flop of Timer 2 is used to enable or disable the Timer 3 output.

Timer 2 can be driven by the toggle output signal of Timer 3 or any other clock source (see

“Combination Mode 11: Burst Modulation 1” on page 92).

23.3.2

Timer 3 – Mode 7: Carrier Frequency Burst Modulation Controlled by SSI Internal Output (SO)

The Timer 3 counter is driven by an internal or external clock source. Its compare- and compare

mode registers must be programmed to generate the carrier frequency via the output toggle

flip-flop. The output (SO) of the SSI is used to enable or disable the Timer 3 output. The SSI

should be supplied with the toggle signal of Timer 2 (see “Combination Mode 12: Burst Modula-

tion 2” on page 94).

23.3.3

Timer 3 – Mode 8: FSK Modulation with Shift Register Data (SO)

The two compare registers are used for generating two different time intervals. The SSI internal

data output (SO) selects which compare register is used for the output frequency generation. A

"0" level at the SSI data output enables the compare register 1. A "1" level enables compare reg-

ister 2. The compare- and compare-mode registers must be programmed to generate the two

frequencies via the output toggle flip-flop. The SSI can be supplied with the toggle signal of

Timer 2. The Timer 3 counter is driven by an internal or external clock source. The Timer 2

counter is driven by the Counter 3 (TOG3) (see “Combination Mode 13: FSK Modulation” on

page 94).

Figure 23-8. FSK Modulation

012340 1 23401 2 3

Counter 3

CM31

CM32

40 1 2 0 12012 0 120 1 201201 20 1 2 3

T3R

T3O

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