ATMEGA64-16AI datasheet(39/393 Pages) ATMEL

39 / 393 page

ATmega64(L)

2490L–AVR–10/06

XDIV – XTAL Divide Control

The XTAL Divide Control Register is used to divide the source clock frequency by a

number in the range 2 - 129. This feature can be used to decrease power consumption

when the requirement for processing power is low.

• Bit 7 – XDIVEN: XTAL Divide Enable

When the XDIVEN bit is written one, the clock frequency of the CPU and all peripherals

(clk

I/O, clkADC, clkCPU, clkFLASH) is divided by the factor defined by the setting of XDIV6 -

XDIV0. This bit can be written run-time to vary the clock frequency as suitable to the

application.

• Bits 6..0 – XDIV6..XDIV0: XTAL Divide Select Bits 6 - 0

These bits define the division factor that applies when the XDIVEN bit is set (one). If the

value of these bits is denoted d, the following formula defines the resulting CPU and

peripherals clock frequency f

clk:

The value of these bits can only be changed when XDIVEN is zero. When XDIVEN is

written to one, the value written simultaneously into XDIV6..XDIV0 is taken as the divi-

sion factor. When XDIVEN is written to zero, the value written simultaneously into

XDIV6..XDIV0 is rejected. As the divider divides the master clock input to the MCU, the

speed of all peripherals is reduced when a division factor is used.

Note:

When the system clock is divided, Timer/Counter0 can be used with Asynchronous clock

only. The frequency of the asynchronous clock must be lower than 1/4th of the frequency

of the scaled down Source clock. Otherwise, interrupts may be lost, and accessing the

Timer/Counter0 registers may fail.

Default Clock Source

The device is shipped with CKSEL = “0001” and SUT = “10”. The default clock source

setting is therefore the Internal RC Oscillator with longest startup time. This default set-

ting ensures that all users can make their desired clock source setting using an In-

System or Parallel Programmer.

Crystal Oscillator

XTAL1 and XTAL2 are input and output, respectively, of an inverting amplifier which can

be configured for use as an On-chip Oscillator, as shown in Figure 19. Either a quartz

crystal or a ceramic resonator may be used. The CKOPT Fuse selects between two dif-

ferent Oscillator amplifier modes. When CKOPT is programmed, the Oscillator output

will oscillate a full rail-to-rail swing on the output. This mode is suitable when operating

in a very noisy environment or when the output from XTAL2 drives a second clock

buffer. This mode has a wide frequency range. When CKOPT is unprogrammed, the

Oscillator has a smaller output swing. This reduces power consumption considerably.

This mode has a limited frequency range and it cannot be used to drive other clock

buffers.

For resonators, the maximum frequency is 8 MHz with CKOPT unprogrammed and

16 MHz with CKOPT programmed. C1 and C2 should always be equal for both crystals

and resonators. The optimal value of the capacitors depends on the crystal or resonator

in use, the amount of stray capacitance, and the electromagnetic noise of the environ-

ment. Some initial guidelines for choosing capacitors for use with crystals are given in

Bit

543

210

0x3C (0x5C)

XDIVEN

XDIV6

XDIV5

XDIV4

XDIV3

XDIV2

XDIV1

XDIV0

XDIV

Read/Write

R/W

Initial Value

CLK

Source clock

129

–

----------------------------------

ATMEGA64-16AI датащи(PDF) 39 Page - ATMEL Corporation

ATMEGA64-16AI датащи(HTML) 39 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL