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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AMC131M02DFMR датащи(PDF) 63 Page - Texas Instruments |
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AMC131M02DFMR датащи(HTML) 63 Page - Texas Instruments |
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63 / 89 page  8.6.12 CH1_CFG Register (Address = 0Eh) [Reset = 0000h] Return to the Summary Table. Figure 8-42. CH1_CFG Register 15 14 13 12 11 10 9 8 PHASE1[9:0] R/W-0000000000b 7 6 5 4 3 2 1 0 PHASE1[9:0] RESERVED MUX1[1:0] R/W-0000000000b R-0000b R/W-00b Table 8-26. CH1_CFG Register Field Descriptions Bit Field Type Reset Description 15:6 PHASE1[9:0] R/W 0000000000b Channel 1 phase delay selection Phase delay in modulator clock cycles provided in twos complement format. 5:2 RESERVED R 0000b Reserved Always reads 0000b 1:0 MUX1[1:0] R/W 00b Channel 1 input selection Input multiplexer for channel 1 00b = AIN1P and AIN1N 01b = AIN1 disconnected (ADC inputs shorted) 10b = DC diagnostic signal 11b = AC diagnostic signal www.ti.com AMC131M02 SBASA56 – SEPTEMBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 63 Product Folder Links: AMC131M02 |
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