TMS320C32PCMA50 datasheet(25/45 Pages) TI

номер детали	TMS320C32PCMA50

подробное описание детали	DIGITAL SIGNAL PROCESSOR

PDF	45 Pages

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производитель	TI [Texas Instruments]

домашняя страница	http://www.ti.com

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25 / 45 page

TMS320C32

DIGITAL SIGNAL PROCESSOR

SPRS027C – JANUARY 1995 – REVISED DECEMBER 1996

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

memory-write-cycle timing using IOSTRB (see Figure 19)

’C32 - 40

’C32 - 50

’C32 - 60

UNIT

NO.

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

11.1

td(H3L-IOSL)

Delay time, H3 low to IOSTRB low

0†

12.1

td(H3L-IOSH)

Delay time, H3 low to IOSTRB high

0†

13.1

td(H1L-RWL)

Delay time, H1 low to R / W high

0†

14.1

td(H1L-A)

Delay time, H1 low to A valid

0†

17.1

tsu(RDY)

Setup time, RDY before H1 high

18.1

th(RDY)

Hold time, RDY after H1 high

td(H1L-RWH)

Delay time, H1 low to R / W low

0†

tv(D)W

Valid time, D after H1 high

th(D)W

Hold time, D after H1 low

† Assured from characterization but not tested

R/W

RDY

IOSTRB

11.1†

12.1†

17.1†

18.1†

13.1†

14.1†

23†

† See Figure 18 and accompanying table.

Figure 19. Memory-Write-Cycle Timing Using IOSTRB

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