TMS320C32

DIGITAL SIGNAL PROCESSOR

SPRS027C – JANUARY 1995 – REVISED DECEMBER 1996

19

POST OFFICE BOX 1443

PARAMETER MEASUREMENT INFORMATION (CONTINUED)

signal-transition levels for ’C32 (see Figure 12 and Figure 13)

TTL-level outputs are driven to a minimum logic-high level of 2.4 V and to a maximum logic-low level of 0.6 V.

Output transition times are specified in the following paragraph.

For a high-to-low transition on an output signal, the level at which the output is said to be no longer high is

2 V and the level at which the output is said to be low is 1 V. For a low-to-high transition, the level at which the

output is said to be no longer low is 1 V and the level at which the output is said to be high is 2 V ( see Figure 12 ).

0.6 V

1 V

2 V

2.4 V

Figure 12. ’C32 Output Levels

Transition times for TTL-compatible inputs are specified as follows. For a high-to-low transition on an input

signal, the level at which the input is said to be no longer high is 2 V and the level at which the input is said to

be low is 0.8 V. For a low-to-high transition on an input signal, the level at which the input is said to be no longer

low is 0.8 V and the level at which the input is said to be high is 2 V ( see Figure 13 ).

2 V

0.8 V

Figure 13. ’C32 Input Levels