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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMS320C32PCMA50 датащи(PDF) 7 Page - Texas Instruments |
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TMS320C32PCMA50 датащи(HTML) 7 Page - Texas Instruments |
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7 / 45 page  TMS320C32 DIGITAL SIGNAL PROCESSOR SPRS027C – JANUARY 1995 – REVISED DECEMBER 1996 7 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 functional block diagram Boot ROM Program Cache (64 × 32) RAM Block 0 (256 × 32) RAM Block 1 (256 × 32) IR PC CPU1 REG1 REG2 Multiplexer 40 32 32 32 32 32 32 32 24 24 24 24 BK ARAU0 ARAU1 DISP0, IR0, IR1 Extended- Precision Registers (R0–R7) Auxiliary Registers (AR0 – AR7) Other Registers (12) 40 40 40 40 Multiplier 32-Bit Barrel Shifter ALU External Memory Interface Serial Port Data-Transmit Register Data-Receive Register FSX0 DX0 CLKX0 FSR0 DR0 CLKR0 Timer 0 Global-Control Register Timer-Period Register Timer-Counter Register TCLK0 Timer 1 Global-Control Register Timer-Period Register Timer-Counter Register TCLK1 PDATA Bus PADDR Bus DDATA Bus DADDR1 Bus DADDR2 Bus DMADATA Bus 40 32 24 24 24 24 32 32 32 CPU2 32 32 40 40 Serial Port- Control Reg. Receive/Transmit (R/X)Timer Register DMAADDR Bus STRB0 Control Reg. STRB1 Control Reg. IOSTRB Control Reg. STRB1 IOSTRB STRB0 RESET INT(3-0) IACK XF(1,0) H1 H3 MCBL / MP CLKIN VDD VSS SHZ EMU0–3 32 24 A23 – A0 D31 – D0 R/W RDY HOLD HOLDA PRGW STRB0_B3/A–1 STRB0_B2/A–2 STRB0_B1 STRB0_B0 IOSTRB Multiplexer DMA Controller Global-Contol Register Source-Address Register Destination-Address Reg. Transfer-Counter Reg. DMA Channel 0 Global-Control Register Source-Address Register Destination-Address Reg. Transfer-Counter Reg. DMA Channel 1 STRB1_B3/A–1 STRB1_B2/A–2 STRB1_B1 STRB1_B0 operation Operation of the TMS320C32 is identical to the TMS320C30 and TMS320C31 digital signal processors, with the exception of an enhanced external memory interface and the addition of two CPU power-management modes. external-memory interface The TMS320C32 has a configurable external-memory interface with a 24-bit address bus, a 32-bit data bus, and three independent multifunction strobes. The flexibility of this unique interface enables product designers to minimize external-memory chip count. |
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