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TAS5504 датащи(PDF) 86 Page - Texas Instruments |
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TAS5504 датащи(HTML) 86 Page - Texas Instruments |
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86 / 96 page ![]() Serial Control Interface Register Definitions 80 SLES123 − October 2004 TAS5504 6.27 Volume Biquad Register (0xCF) Each gain coefficient is in 28-bit (5.23) format so 0x800000 is a gain of 1. Each gain coefficient is written as a 32-bit word with the upper four bits not used. Table 6−32. Volume Biquad Register Format (Default = All-pass) DESCRIPTION REGISTER FIELD CONTENTS DEFAULT GAIN COEFFICIENT VALUES DESCRIPTION REGISTER FIELD CONTENTS DECIMAL HEX bo Coefficient 0U (31:28), b0 (27:24), b0 (23:16), b0 (15:8), b0 (7:0) 1.0 0x00, 0x80, 0x00, 0x00 b1 Coefficient U (31:28), b1 (27:24), b1 (23:16), b1 (15:8), b1 (7:0) 0.0 0x00, 0x00, 0x00, 0x00 b2 Coefficient U (31:28), b2 (27:24), b2 (23:16), b2 (15:8), b2 (7:0) 0.0 0x00, 0x00, 0x00, 0x00 a1 Coefficient 0U (31:28), a1 (27:24), a1 (23:16), a1 (15:8), a1 (7:0) 0.0 0x00, 0x00, 0x00, 0x00 a2 Coefficient U (31:28), a2 (27:24), a2 (23:16), a2 (15:8), a2 (7:0) 0.0 0x00, 0x00, 0x00, 0x00 6.28 Volume Treble and Bass Slew Rates (0xD0) Table 6−33. Volume Gain Update Rate (Slew Rate) D31−D10 D9 D8 FUNCTION 0 0 0 512 step update at 4 Fs, 42.6 ms at 48 kHz 0 0 1 1024 step update at 4 Fs, 85.3 ms at 48 kHz 0 1 0 2048 step update at 4 Fs, 170 ms at 48 kHz 0 1 1 2048 step update at 4 Fs, 170 ms at 48 kHz Table 6−34. Treble and Bass Gain Step Size (Slew Rate) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 0 0 0 0 0 0 0 0 No operation 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 0 Minimum rate – Updates every 0.083 ms (every LRCLK at 48 kHz) 0 0 1 0 0 0 0 0 Update ever 0.67 ms (32 LRCLKs at 48 kHz) 0 0 1 1 1 1 1 1 Default rate − Updates every 1.31 ms (63 LRCLKs at 48 kHz). This is the maximum constant time that can be set for all sample rates. 1 1 1 1 1 1 1 1 Minimum rate – Updates every 5.08 ms (every 255 LRCLKs at 48 kHz) 6.29 Volume Registers (0xD1, 0xD2, 0xD7, and 0xD8) Channels 1, 2, 3, and 4 are mapped into registers 0xD1, 0xD2, 0xD7, and 0xD8. Master volume is mapped into register 0xD9. Bits D31 − D12 are Don’t Care. Table 6−35. Volume Registers D31 D30 D29 D28 D27 D26 D25 D24 FUNCTION Unused bits D23 D22 D21 D20 D19 D18 D17 D16 FUNCTION Unused bits D15 D14 D13 D12 D11 D10 D9 D8 FUNCTION V11 V10 V9 V8 Volume D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION V7 V6 V5 V4 V3 V2 V1 V0 Volume |
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