CS5535 datasheet(129/555 Pages) NSC

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UART/IR Controller Functional Description (Continued)

The transmission bytes are either de-serialized or run-

length encoded, and the resulting bit-string modulates a

carrier signal that is sent to the transmitter LED. The trans-

fer rate of this bit-string, like in UART mode, is determined

by the value programmed in the Baud Generator Divisor

PARITY bits are not included in the transmitted data

stream. A logic 1 in the bit-string keeps the LED off, so no

IR signal is transmitted. A logic 0 generates a sequence of

modulating pulses that turn on the transmitter LED. Fre-

quency and pulse width of the modulating pulses are pro-

grammed by the MCFR and MCPW fields in the IRTXMC

The RC_MMD field of RCCFG selects the transmitter mod-

ulation mode. If the C_PLS mode is selected, modulating

pulses are generated continuously for the entire logic 0 bit

time. If 6_PLS or 8_PLS mode is selected, six or eight

pulses are generated each time a logic 0 bit is transmitted

following a logic 1 bit.

C_PLS modulation mode is used for RC-5, RC-6, NEC,

and RCA protocols. 8_PLS or 6_PLS modulation mode is

used for the RECS 80 protocol. The 8_PLS or 6_PLS

mode allows minimization of the number of bits needed to

represent the RECS 80 IR code sequence. The current

transmitter implementation supports only the modulated

modes of the RECS 80 protocol; it does not support the

Flash mode.

Note:

The total transmission time for the logic 0 bits must

be equal to or greater than six or eight times the

period of the modulation subcarrier, otherwise

fewer pulses will be transmitted.

CEIR Receive Operation

The CEIR receiver is significantly different from a UART

receiver. The incoming IR signals are DASK modulated;

therefore, demodulation may be necessary. Also, there are

no START bits in the incoming data stream.

The operations performed by the receiver, whenever an IR

signal is detected, are slightly different, depending on

whether or not receiver demodulation is enabled. If demod-

ulation is disabled, the receiver immediately becomes

active. If demodulation is enabled, the receiver checks the

carrier frequency of the incoming signal and becomes

active only if the frequency is within the programmed

range. Otherwise, the signal is ignored and no other action

is taken.

When the receiver enters the Active state, the RXACT bit of

the ASCR is set to 1. Once in the Active state, the receiver

keeps sampling the IR input signal and generates a bit-

string, where a logic 1 indicates an Idle condition and a

logic 0 indicates the presence of IR energy. The IR input is

sampled regardless of the presence of IR pulses at a rate

determined by the value loaded into the Baud Generator

Divisor Registers. The received bit-string is either de-serial-

ized and assembled into 8-bit characters, or is converted to

run-length encoded values. The resulting data bytes are

then transferred into the receiver FIFO (RX_FIFO).

The receiver also sets the RXWDG bit of the ASCR each

time an IR pulse signal is detected. This bit is automatically

cleared when the ASCR is read. It is intended to assist the

software in determining when the IR link has been Idle for a

period of time. The software can then stop data from being

received by writing a 1 into the RXACT bit to clear it, and

return the receiver to the inactive state.

The frequency bandwidth for the incoming modulated IR

signal is selected by the DFR and DBW fields in the

IRRXDC register. There are two CEIR receive data modes:

Oversampled and Programmed T Period. For either mode,

the sampling rate is determined by the setting of the Baud

Generator Divisor Registers.

Oversampled mode can be used with the receiver demodu-

lator either enabled or disabled. It should be used with the

demodulator disabled when a detailed snapshot of the

incoming signal is needed; for example, to determine the

period of the carrier signal. If the demodulator is enabled,

the stream of samples can be used to reconstruct the

incoming bit-string. To obtain good resolution, a fairly high

sampling rate should be selected.

Programmed T Period mode should be used with the

receiver demodulator enabled. The T Period represents

one-half bit time for protocols using biphase encoding or

the basic unit of pulse distance for protocols using pulse

distance encoding. The baud is usually programmed to

match the T Period. For long periods of logic low or high,

the receiver samples the demodulated signal at the pro-

grammed sampling rate.

When a new IR energy pulse is detected, the receiver syn-

chronizes the sampling process to the incoming signal tim-

ing. This reduces timing-related errors and eliminates the

possibility of missing short IR pulse sequences, especially

with the RECS 80 protocol. In addition, the Programmed T

Period sampling minimizes the amount of data used to rep-

resent the incoming IR signal, therefore reducing the pro-

cessing overhead in the host CPU.

4.11.1.5 FIFO Timeouts

Timeout mechanisms are provided to prevent received

data from remaining in the RX_FIFO indefinitely, in case

the programmed interrupt or DMA thresholds are not

reached.

An RX_FIFO timeout generates a Receiver Data Ready

interrupt and/or a receiver DMA request if bit 0 of the IER

mode) are set to 1, respectively. An RX_FIFO timeout also

sets bit 0 of the ASCR register to 1 if the RX_FIFO is below

the threshold. When a Receiver Data Ready interrupt

occurs, this bit is tested by the software to determine

whether a number of bytes indicated by the RX_FIFO

threshold can be read without checking bit 0 of the LSR

The conditions that must exist for a timeout to occur in the

modes of operation are described below. When a timeout

has occurred, it can only be reset when the FIFO is read by

the processor or DMA controller.

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