CS5535 datasheet(128/555 Pages) NSC

128 / 555 page

www.national.com

128

Revision 0.8

UART/IR Controller Functional Description (Continued)

UART mode can be implemented in standard 16450 and

16550 compatibility (non-extended) and extended mode.

UART 16450 compatibility mode is the default after power-

up or reset. When extended mode is selected, the func-

tional block architecture changes slightly and a variety of

additional features are made available. The interrupt

sources are no longer prioritized, and an Auxiliary Status

and Control Register (ASCR) replaces the Scratch Pad

FIFO (TX_FIFO) thresholding, DMA capability, and inter-

rupts on transmitter empty states and DMA events.

The clock for both transmit and receive channels is pro-

vided by an internal baud generator that divides its input

clock by any divisor value from 1 to 216-1. The output clock

frequency of the baud generator must be programmed to

be 16 times the baud rate value. The baud generator input

clock is derived from a 24 MHz clock through a program-

mable prescaler. The prescaler value is determined by the

PRESL bits in the EXCR2 register. Its default value is 13.

This allows all the standard baud rates, up to 115.2 kbaud,

to be obtained. Smaller prescaler values allow baud rates

up to 921.6 kbaud (standard) and 1.5 Mbaud (non-stan-

dard).

Before operation can begin, both the communication for-

mat and baud rate must be programmed by the software.

The communication format is programmed by loading a

control byte into the LCR (Link Control Register), while the

baud rate is selected by loading an appropriate value into

the Baud Generator Divisor Register. The software can

read the status of the functional block at any time during

operation. The status information includes Full/Empty

states for both transmit and receive channels, and any

other condition detected on the received data stream, such

as a parity error, framing error, data overrun, or break

event.

4.11.1.2 Sharp-IR Mode

This mode supports bidirectional data communication with

a remote device, using IR radiation as the transmission

medium. Sharp-IR uses Digital Amplitude Shift Keying

(DASK) and allows serial communication at baud rates up

to 38.4 kbaud. The format of the serial data is similar to that

of the UART data format. Each data word is sent serially,

beginning with a 0 value START bit, followed by up to eight

data bits (LSB first), an optional parity bit, and ending with

at least one STOP bit, with a binary value of 1. A logical 0 is

signalled by sending a 500 kHz continuous pulse train of IR

radiation. A logical 1 is signalled by the absence of an IR

signal. This functional block can perform the modulation

and demodulation operations internally, or can rely on the

external optical module to perform them.

Sharp-IR device operation is similar to operation in UART

mode. The difference being that data transfer operations

are normally performed in half-duplex fashion, and the

modem control and status signals are not used. Selection

of the Sharp-IR mode is controlled by the Mode Select

(MDSL) bits in the MCR when the functional block is in

extended mode, or by the IR_SL bits in the IRCR1 register

when the functional block is in non-extended mode.) This

prevents legacy software, running in non-extended mode,

from spuriously switching the functional block to UART

mode when the software writes to the MCR.

4.11.1.3 SIR Mode

SIR mode supports bidirectional data communication with

a remote device, using IR radiation as the transmit

medium. SIR allows serial communication at baud rates up

to 115.2 kbaud. The serial data format is similar to that of

the UART data format. Each data word is sent serially,

beginning with a 0 value START bit, followed by eight data

bits (LSB first), an optional PARITY bit, and ending with at

least one STOP bit, with a binary value of 1. A 0 value is

signalled by sending a single IR pulse. A 1 value is sig-

nalled by the absence of a pulse. The width of each pulse

can be either 1.6

µs (3/16 the time required to transmit a

single bit at 115.2 kbps). This way, each word begins with a

pulse at the START bit.

Operation in SIR is similar to that of the UART mode. The

difference being that data transfer operations are normally

performed in half-duplex fashion. Selection of the IrDA 1.0

SIR mode is controlled by the MDSL bits in the MCR when

the UART is in extended mode, or by the IR_SL bits in the

IRCR1 register when the UART is in non-extended mode.

This prevents legacy software, running in non-extended

mode, from spuriously switching the functional block to

UART mode when the software writes to the MCR.

4.11.1.4 CEIR Mode

The Consumer Electronics IR circuitry is designed to opti-

mally support all major protocols presently used in the fol-

lowing remote-controlled home entertainment equipment:

RC-5, RC-6, RECS 80, NEC, and RCA. This module, in

conjunction with an external optical device, provides the

physical layer functions necessary to support these proto-

cols. Such functions include: modulation, demodulation,

serialization, de-serialization, data buffering, status report-

ing, interrupt generation, etc. The software is responsible

for the generation of IR code transmitted, and the interpre-

tation of received code.

CEIR Transmit Operation

The transmitted code consists of a sequence of bytes that

represents either a bit string or a set of run-length codes.

The number of bits or run-length codes needed to repre-

sent each IR code bit depends on the IR protocol used.

The RC-5 protocol, for example, needs two bits or between

one and two run-length codes to represent each IR code

bit.

Transmission is initiated when the processor or DMA con-

troller writes code bytes into the empty TX_FIFO. Trans-

mission is completed when the processor sets the S_EOT

bit of the ASCR, before writing the last byte, or when the

DMA controller activates the terminal count (TC). Transmis-

sion also terminates if the processor simply stops transfer-

ring data and the transmitter becomes empty. In this case,

however, a transmitter-underrun condition is generated that

must be cleared in order to begin the next transmission.

CS5535 датащи(PDF) 128 Page - National Semiconductor (TI)

CS5535 датащи(HTML) 128 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL