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WM8985GEFL/R датащи(PDF) 87 Page - Wolfson Microelectronics plc |
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WM8985GEFL/R датащи(HTML) 87 Page - Wolfson Microelectronics plc |
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87 / 118 page ![]() Pre-Production WM8985 w PP, Rev 3.4, October 2006 87 POWER MANAGEMENT SAVING POWER BY REDUCING OVERSAMPLING RATE The default mode of operation of the ADC and DAC digital filters is in 64x oversampling mode. Under the control of ADCOSR128 and DACOSR128 the oversampling rate may be doubled. 64x oversampling results in a slight decrease in noise performance compared to 128x but lowers the power consumption of the device. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R10 (0Ah) DAC control 3 DACOSR128 0 DAC oversample rate select 0 = 64x (lowest power) 1 = 128x (best SNR) R14 (0Eh) ADC control 3 ADCOSR128 0 ADC oversample rate select 0 = 64x (lowest power) 1 = 128x (best SNR) Table 48 ADC and DAC Oversampling Rate Selection LOW POWER MODE If only DAC or ADC functionality is required, the WM8985 can be put into a low power mode. In this mode, the DSP core runs at half of the normal rate, reducing digital power consumption of the core by half. For DAC low power only, 3D enhancement with 2-Band equaliser functionality is permitted, where only Band 1 (low shelf) and Band 5 (high shelf) can be used. For ADC low power, the equaliser and 3D cannot be used. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R7 (07h) Additional Ctrl 8 M128ENB 0 0 = low power mode enabled 1 = low power mode disabled Table 49 DSP Core Low Power Mode Control There are 3 modes of low power operation, as detailed below. The device will not enter low power unless in one of these register configurations, regardless of M128ENB. For pop-free operation of the device it is recommended to change the M128ENB low power functionality only when both the DACs and ADCs are disabled, i.e. when DACENL=0, DACENR=0, ADCENL=0 and ADCENR=0. FUNCTION REGISTER BITS SETTING DESCRIPTION ADC low power M128ENB ADCENL ADCENR DACENL DACENR EQ3DMODE 0 1 1 0 0 1 (DAC path) Either or both of ADCENL and ADCENR must be set (mono or stereo mode) DAC low power M128ENB ADCENL ADCENR DACENL DACENR 0 0 0 1 1 Either or both of DACENL and DACENR must be set (mono or stereo mode) EQ3DMODE = 0: EQ in ADC path EQ3DMODE = 1: EQ in DAC path Table 50 DSP Core Low Power Modes for ADC Only and DAC Only Modes |
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