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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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WM8985GEFL/R датащи(PDF) 38 Page - Wolfson Microelectronics plc |
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WM8985GEFL/R датащи(HTML) 38 Page - Wolfson Microelectronics plc |
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38 / 118 page  WM8985 Pre-Production w PP, Rev 3.4, October 2006 38 Figure 18 Microphone Bias Schematic ANALOGUE TO DIGITAL CONVERTER (ADC) The WM8985 uses stereo multi-bit, oversampled sigma-delta ADCs. The use of multi-bit feedback and high oversampling rates reduces the effects of jitter and high frequency noise. The ADC Full Scale input level is proportional to AVDD1. With a 3.3V supply voltage, the full scale level is 1.0Vrms. Any voltage greater than full scale may overload the ADC and cause distortion. ADC DIGITAL FILTERS The ADC filters perform true 24 bit signal processing to convert the raw multi-bit oversampled data from the ADC to the correct sampling frequency to be output on the digital audio interface. The digital filter path for each ADC channel is illustrated in Figure 19. Figure 19 ADC Digital Filter Path The ADCs are enabled by the ADCENL/R register bit. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 0 ADCENL 0 Enable ADC left channel: 0 = ADC disabled 1 = ADC enabled R2 (02h) Power management 2 1 ADCENR 0 Enable ADC right channel: 0 = ADC disabled 1 = ADC enabled Table 13 ADC Enable Control |
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